c1355.ratio
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	------------- normal 3T ---------------

	yosys> stat -liberty ./nem_liberty/nem_basic_yosys.lib

	14. Printing statistics.

	=== c1355_nem ===

	Number of wires: 227
	Number of wire bits: 227
	Number of public wires: 73
	Number of public wire bits: 73
	Number of ports: 73
	Number of port bits: 73
	Number of memories: 0
	Number of memory bits: 0
	Number of processes: 0
	Number of cells: 186
	and_3T 2
	inv_3T 5
	nand_3T 41
	nor_3T 30
	or_3T 3
	xnor_3T 77
	xor_3T 28

	Chip area for module '\c1355_nem': 1048072.000000
	of which used for sequential elements: 0.000000 (0.00%)

	------------- 4T ---------------

	yosys> stat -liberty ./nem_liberty/nem_basic_yosys_extended.lib

	14. Printing statistics.

	=== c1355_nem ===

	Number of wires: 221
	Number of wire bits: 221
	Number of public wires: 73
	Number of public wire bits: 73
	Number of ports: 73
	Number of port bits: 73
	Number of memories: 0
	Number of memory bits: 0
	Number of processes: 0
	Number of cells: 180
	and_4T 49
	and_not_4T 18
	inv_3T 1
	or_4T 7
	xnor_4T 91
	xor_4T 14

	Chip area for module '\c1355_nem': 353512.000000
	of which used for sequential elements: 0.000000 (0.00%)

	------------- Muxig ---------------
	------------- Stats ---------------
	Area 3T: 1048072.000000
	Area 4T: 353512.000000
	Ratio 4T->3T: .33729743758062423192%
	Area MUX:
	Ratio MUX->3T: %