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	diff --git a/bruteforce_approach/bruteforce.c b/bruteforce_approach/bruteforce.c
	index 73c3339..33290f9 100644
	--- a/bruteforce_approach/bruteforce.c
	+++ b/bruteforce_approach/bruteforce.c
	@@ -1,304 +1,374 @@
	#include <stdio.h>
	#include <stdlib.h>
	#include <pthread.h>
	#include <stdint.h>
	#include <string.h>
	+#include <unistd.h>

	// -------------- config

	-#define MAX_AREA 100000000
	-#define NUM_THREADS 1 //Needs to be <= 9 or 18 or 27 for efficient splitting the work load
	-#define NUM_INPUTS 2
	+#define MAX_AREA 10000
	+#define NUM_THREADS 3 //Needs to be <= 9 or 18 or 27 for efficient splitting the work load
	+#define NUM_INPUTS 3
	#define MAX_GATES 5

	-#define USE_CIRCUIT_FOR_THRUTH_TABLE 0 //0: use target_function, 1: use Circuits
	-
	//0:
	-int target_function(int inputs[]) {
	- return inputs[0] ^ inputs[1];
	-}

	-//1:
	+int target_function(int inputs[]) {
	+ int ys__n0 = inputs[0];
	+ int ys__n1 = inputs[1];
	+ int ys__n5 = inputs[2];

	+ return (ys__n0 && ((!ys__n1 && !ys__n5) \|\| (ys__n1 && ys__n5))) \|\| (!ys__n0 && ((!ys__n1 && ys__n5) \|\| (ys__n1 && !ys__n5))); // ys__n7
	+}

	+/*
	+int target_function(int inputs[]) {
	+ return inputs[0] ^ inputs[1];
	+}*/

	// -------------- structs

	typedef struct {
	char* type;
	int area;
	} GateType;

	typedef struct {
	GateType* gate;
	int in1;
	int in2;
	} Gate;

	typedef struct {
	Gate gates[MAX_GATES];
	int gate_count;
	int area;
	} Circuit;

	typedef struct {
	- Circuit best_circuit;
	+ Circuit volatile best_circuit;
	GateType *gate_types;
	int num_inputs;
	int num_gates;
	- int best_area;
	+ int volatile best_area;
	int *truth_table;
	int *target_outputs;
	int worker_id;
	+ int num_circuit[2]; //first is the amount in million and the second is the increment counter.
	+ pthread_mutex_t mutex;
	} ThreadArgs;

	-Circuit test_circuit= {
	- {
	-
	- },
	- ,
	-
	-}

	// -------------- define used gates
	-
	+/*
	GateType gate_types[] = {
	{"INV", 1160},
	{"AND", 3472},
	{"NAND", 2832},
	{"OR", 3472},
	{"NOR", 2832},
	{"XOR", 4632},
	{"XNOR", 4632},
	{"ANDNOT", 3472},
	{"ORNOT", 3472}
	+};*/
	+
	+
	+GateType gate_types[] = {
	+ {"INV", 1160},
	+ {"AND", 1288},
	+ {"NAND", 2448},
	+ {"OR", 1288},
	+ {"NOR", 2448},
	+ {"XOR", 2448},
	+ {"XNOR", 2448},
	+ {"ANDNOT", 1288},
	+ {"ORNOT", 1288}
	};

	// -------------- start functions

	int evaluate_circuit(GateType* all_gates, Circuit* circuit, int* inputs) {
	int intermediate_outputs[NUM_INPUTS + MAX_GATES];
	memcpy(intermediate_outputs, inputs, NUM_INPUTS * sizeof(int));

	for (int i = 0; i < circuit->gate_count; i++) {
	int out1 = intermediate_outputs[circuit->gates[i].in1];
	int out2 = intermediate_outputs[circuit->gates[i].in2];
	int output = 0;

	if (circuit->gates[i].gate == &all_gates[0]) //INV
	output = ~out1 & 1;
	else if (circuit->gates[i].gate == &all_gates[1]) //AND
	output = out1 & out2;
	else if (circuit->gates[i].gate == &all_gates[2]) //NAND
	output = ~(out1 & out2) & 1;
	else if (circuit->gates[i].gate == &all_gates[3]) //OR
	output = out1 \| out2;
	else if (circuit->gates[i].gate == &all_gates[4]) //NOR
	output = ~(out1 \| out2) & 1;
	else if (circuit->gates[i].gate == &all_gates[5]) //XOR
	output = out1 ^ out2;
	else if (circuit->gates[i].gate == &all_gates[6]) //XNOR
	output = ~(out1 ^ out2) & 1;
	else if (circuit->gates[i].gate == &all_gates[7]) //ANDNOT
	output = out1 & (~out2 & 1);
	else if (circuit->gates[i].gate == &all_gates[8]) //ORNOT
	output = out1 \| (~out2 & 1);

	intermediate_outputs[NUM_INPUTS + i] = output;
	}
	return intermediate_outputs[NUM_INPUTS + circuit->gate_count - 1];
	}

	int detect_tautology(Circuit current_circuit, int in1, int in2, int gate_selected, ThreadArgs data){
	if ((in1 == in2 && gate_selected != 0) \|\| //NOTE THAT IF i == 0 THEN WE SELECT INV
	(in1 != in2 && gate_selected == 0) \|\|
	(in1 > in2 && gate_selected != 7 && gate_selected != 8)) { //NOTE THAT i == 7 IS ANDNOT and i ==8 is ORNOT
	return 1;
	}

	+ for(int i=0; i<(current_circuit->gate_count-1);i++){
	+ if(current_circuit->gates[i].gate == &data->gate_types[gate_selected]){
	+ if(current_circuit->gates[i].in1 == in1 && current_circuit->gates[i].in2 == in2){
	+ return 1; //DETECTED A COMPLETE equivalent circuit
	+ }
	+ }
	+ }
	+
	int input_used[current_circuit->gate_count + data->num_inputs];
	memset(input_used, 0, sizeof(input_used));
	for(int i=0; i<current_circuit->gate_count; i++){
	input_used[current_circuit->gates[i].in1] = 1;
	input_used[current_circuit->gates[i].in2] = 1;
	}

	input_used[in1] = 1;
	input_used[in2] = 1;

	for(int i=0; i<(current_circuit->gate_count + data->num_inputs -1);i++){
	if(input_used[i]==0 && current_circuit->gate_count!=0){
	return 2;
	}
	}

	return 0;
	}

	void generate_circuits_recursive(Circuit current_circuit, int depth, ThreadArgs data) {
	if (depth == data->num_gates){
	// Reached end of amount of gates.
	return;
	}

	GateType* gate_types = data->gate_types;

	// Loop through gate types and inputs to build possible circuits
	int num_gate_types = 9;
	int division = (num_gate_types + NUM_THREADS-1)/NUM_THREADS;
	int multi_core_division=NUM_THREADS/num_gate_types;
	//0 - 2, 3 - 5, 6 - 8
	for (int i = 0; i < num_gate_types; i++) {

	// ----------------- Going for multi processor approach
	if(depth == 0){//at first level has to seperate into threads
	if(NUM_THREADS<=9){
	if((i<(data->worker_iddivision)) \| (i>=((data->worker_id+1)division))){
	//printf("Thread %d, skipping %s\n",data->worker_id,data->gate_types[i].type);
	continue;
	}
	} else {
	if( i != (data->worker_id/multi_core_division)){
	//printf("Thread %d, skipping %s\n",data->worker_id,data->gate_types[i].type);
	continue;
	}
	}
	} else if (depth == 1 && NUM_THREADS>9) {
	if((i<(data->worker_id%multi_core_division)(9/multi_core_division)) \| (i>=((data->worker_id+1)%multi_core_division)(9/multi_core_division))){
	//printf("at depth 1 Thread %d, skipping %s\n",data->worker_id,data->gate_types[i].type);
	continue;
	}
	}

	+ if((current_circuit->area+data->gate_types[i].area)>data->best_area){
	+ //printf("worker %d: area %d on gate type %d and depth %d larger then best area %d continueing\n",data->worker_id,current_circuit->area,i,depth,data->best_area);
	+ continue;
	+ }

	for (int in1 = 0; in1 < depth + data->num_inputs; in1++) {
	for (int in2 = 0; in2 < depth + data->num_inputs; in2++) {
	- // Skip invalid gate configurations as in Python code
	+ data->num_circuit[0] += 1;
	+
	+

	// Add the new gate to the circuit
	current_circuit->gates[depth].gate = &gate_types[i]; //set pointer to the type of gate
	current_circuit->gates[depth].in1 = in1;
	current_circuit->gates[depth].in2 = in2;
	current_circuit->gate_count = depth + 1;

	//if(current_circuit->gates[0].gate==&data->gate_types[5]){ // && current_circuit->gates[1].gate==&data->gate_types[5] && current_circuit->gates[2].gate==&data->gate_types[6]){
	// printf("test\n");
	//}
	int tautology = detect_tautology(current_circuit,in1,in2,i,data); //0: nothing found, 1: direct tautology, 2:unconnected device may still be connected.
	if(tautology==1){
	continue; //Found already unnecessary combo and should skip it
	}

	int valid = 0;

	if(tautology!=2){ //There is an unconnected gate if this holds true
	valid = 1;
	for (int y=0; y < (1 << data->num_inputs); y++){ //CHECK IF IT IS VALID
	if(evaluate_circuit(data->gate_types, current_circuit, &data->truth_table[y*data->num_inputs])!=data->target_outputs[y]){ //Check if it satisfies the equation
	valid = 0;
	}
	}
	}
	//valid circuit add area
	current_circuit->area += gate_types[i].area; // Example area increment (modify as needed)

	+ if(data->num_circuit[0]%10000000 == 0){
	+ data->num_circuit[1] += 1;
	+ data->num_circuit[0] = 0;
	+ printf("At circuit number %d M in worker %d current best_area %d and tested area %d\n",data->num_circuit[1],data->worker_id,data->best_area,current_circuit->area);
	+ }
	+
	+ pthread_mutex_lock(&data->mutex); //get mutex
	if(valid == 1 && current_circuit->area<data->best_area){
	//Found a valid solution!
	- memcpy(&data->best_circuit, current_circuit, sizeof(Circuit)); //write to best circuit
	- printf("Found proper solution\n");
	+ memcpy((void *)&data->best_circuit, current_circuit, sizeof(Circuit)); //write to best circuit
	+ printf("Found proper solution with size %d\n",current_circuit->area);
	for(int y=0; y<current_circuit->gate_count; y++){
	printf("%d: %s, in1: %d, in2: %d\n",y,current_circuit->gates[y].gate->type,current_circuit->gates[y].in1,current_circuit->gates[y].in2);
	}
	data->best_area = current_circuit->area;
	}
	+ pthread_mutex_unlock(&data->mutex);
	// Recurse to add more gates

	generate_circuits_recursive(current_circuit, depth + 1, data);
	current_circuit->area -= gate_types[i].area; // Example area increment (modify as needed)
	+ //printf("worker %d: returning with depth %d and area %d\n",data->worker_id,depth,current_circuit->area);
	}
	}
	}
	}

	void* search_space_worker(void* args) {
	// Define and initialize worker-specific parameters and loop through circuits
	// You will need to pass parameters in `args` and cast them in this function
	ThreadArgs *data;
	data = (ThreadArgs *) args;
	- int best_area = data->best_area;

	Circuit current_circuit;
	current_circuit.area = 0;
	current_circuit.gate_count = 0;

	printf("In thread %d with best Area %d\nGoing in recusive loop to check all circuits\n",data->worker_id, data->best_area);
	generate_circuits_recursive(&current_circuit, 0, data);
	+
	+ //finished set worker_id to 1000 to indicate to the management thread that we finished
	+ pthread_mutex_lock(&data->mutex);
	+ data->worker_id = 1000;
	+ pthread_mutex_unlock(&data->mutex);
	+
	return NULL; // Return the best found circuit and area as needed
	}


	void brute_force_boolean(Circuit* best_circuit, int truth_table[], int target_outputs[], int num_inputs, int max_gates, int max_area) {
	pthread_t threads[NUM_THREADS];
	ThreadArgs thread_args[NUM_THREADS]; // Define `ThreadArgs` to pass data to threads
	int best_area = max_area;
	+ int total_circuits = 0;



	for (int i = 0; i < NUM_THREADS; i++) {
	thread_args[i].gate_types = gate_types;
	thread_args[i].num_inputs = num_inputs;
	thread_args[i].num_gates = max_gates;
	thread_args[i].best_area = best_area;
	thread_args[i].truth_table = truth_table;
	thread_args[i].target_outputs = target_outputs;
	thread_args[i].worker_id = i;
	+ thread_args[i].num_circuit[0] = 0;
	+ thread_args[i].num_circuit[1] = 0;
	+ pthread_mutex_init(&thread_args[i].mutex, NULL);
	pthread_create(&threads[i], NULL, search_space_worker, (void *)&thread_args[i]);
	}

	- for (int i = 0; i < NUM_THREADS; i++) {
	- pthread_join(threads[i], NULL);
	- // Collect best circuits and area from each thread
	- }
	+ int number_of_running_threads = NUM_THREADS;
	+ while(number_of_running_threads>0){
	+ number_of_running_threads = NUM_THREADS;
	+ for (int i = 0; i < NUM_THREADS; i++) {
	+ pthread_mutex_lock(&thread_args[i].mutex); //get lock on the data
	+
	+ //Check if it found a better circuit then known before.
	+ if(thread_args[i].best_area<best_area){
	+ best_area = thread_args[i].best_area;
	+ printf("Found best circuit at size %d, on worker: %d\n",best_area,i);
	+ memcpy(best_circuit, (void *)&thread_args[i].best_circuit, sizeof(Circuit));
	+ }

	- for (int i = 0; i< NUM_THREADS; i++) {
	- if(thread_args[i].best_area<best_area){
	- best_area = thread_args[i].best_area;
	- memcpy(best_circuit, &thread_args[i].best_circuit, sizeof(Circuit));
	+ //found a better circuit by another thread. Update data variable so that it does not searche longer where not necessary
	+ if(thread_args[i].best_area>best_area){
	+ printf("setting the best_area size %d, on worker: %d\n",best_area,i);
	+ thread_args[i].best_area = best_area;
	+ }
	+
	+ //lastly check if the thread_closed
	+ if(thread_args[i].worker_id==1000){
	+ number_of_running_threads -= 1;
	+ }
	+ pthread_mutex_unlock(&thread_args[i].mutex);
	+ // Collect best circuits and area from each thread
	}
	+ printf("running number of threads: %d\n",number_of_running_threads);
	+ sleep(1);
	}
	-
	+ printf("no threads running anymore\n");
	// Output the best circuit
	+
	+ //count total amount of circuits
	+ for(int i=0;i<NUM_THREADS;i++){
	+ total_circuits += thread_args[i].num_circuit[1];
	+ }
	+
	+ printf("Total amount of circuits searched is %d M\n",total_circuits);
	}

	void fill_target_outputs(int truth_table[], int target_outputs[], int num_inputs) {
	int num_combinations = 1 << num_inputs;
	for (int i = 0; i < num_combinations; i++) {
	int inputs[num_inputs];
	for (int j = 0; j < num_inputs; j++) {
	inputs[j] = (i >> j) & 1; // Extract each bit of i as an input
	truth_table[i*num_inputs+j] = (i >> j) & 1;;
	}
	target_outputs[i] = target_function(inputs);
	}
	}



	int main() {
	// Define target function output
	int target_outputs[1 << NUM_INPUTS]; // 1<<NUM_INPUTS is equivalent to 2^NUM_INPUTS
	int truth_table[(1 << NUM_INPUTS)*NUM_INPUTS]; // create a truth_table the size of target_output with an entry for every input.
	fill_target_outputs(truth_table, target_outputs, NUM_INPUTS);

	Circuit best_circuit;

	brute_force_boolean(&best_circuit, truth_table, target_outputs, NUM_INPUTS, MAX_GATES, MAX_AREA);

	printf("Found best solution with area: %d\n",best_circuit.area);
	for(int y=0; y<best_circuit.gate_count; y++){
	printf("%d: %s, in1: %d, in2: %d\n",y,best_circuit.gates[y].gate->type,best_circuit.gates[y].in1,best_circuit.gates[y].in2);
	}
	// Print best circuit details
	return 0;
	}

	diff --git a/run.sh b/run.sh
	index bfae85d..ea73f1b 100755
	--- a/run.sh
	+++ b/run.sh
	@@ -1,355 +1,369 @@
	#!/bin/bash

	FILE=""
	FILE_BASENAME=""
	MODULE=""
	LIBERTY_FILE="nem_basic_yosys.lib"
	LIBERTY_USED="3T"
	visualize=0

	# Function to display the menu and get user input
	show_menu() {


	# Define color codes
	GREEN='\033[0;32m'
	YELLOW='\033[1;33m'
	CYAN='\033[0;36m'
	RESET='\033[0m'

	echo "--------------------------------------------------------------"
	echo -e "${CYAN}Current file: $FILE with module: $MODULE${RESET}"
	echo -e "${YELLOW}Please select your options (you can choose multiple options):${RESET}"
	echo
	echo -e "${GREEN}1)${RESET} Synthesize to NEM technology"
	echo -e "${GREEN}2)${RESET} Print initial design"
	echo -e "${GREEN}3)${RESET} Print out NEM optimized design"
	echo -e "${GREEN}4)${RESET} Perform SAT comparison"
	echo -e "${GREEN}5)${RESET} Export FSM as KISS2 format"
	echo -e "${GREEN}6)${RESET} Start shell with modules"
	echo -e "${GREEN}7)${RESET} Switch from normal 3T gate library to new 4T"
	echo -e "${GREEN}8)${RESET} Run test"
	echo -e "${GREEN}9)${RESET} export PLA for bruteforce"
	echo -e "${GREEN}10)${RESET} Select a new Verilog file"
	echo -e "${GREEN}0)${RESET} Exit the program"
	echo "--------------------------------------------------------------"
	}

	# Request the file to process
	request_data(){
	echo "-:- Enter the file to map to NEM"
	read -e -p "What is the file name?: " FILE
	read -p "What is the name of the top module? (press ENTER for the same as the file name): " MODULE

	if [ ! -f "$FILE" ]; then
	echo "File not found"
	request_data
	fi

	FILE_BASENAME=$(basename "$FILE" \| cut -d. -f1)
	#echo $FILE_BASENAME

	if [ -z "$MODULE" ]; then
	#echo "setting name equal to that of the file"
	MODULE=$FILE_BASENAME
	fi
	}

	#run a yosys file specified to the function
	run_yosys_file() {
	local yosys_file="$1"
	local depth="$2"
	local additional_yosys_args="$3"

	# Start with basic sed commands
	sed_command=$(sed -e "s\|{{FILE}}\|$FILE\|g" \
	-e "s\|{{FILE_BASENAME}}\|$FILE_BASENAME\|g" \
	-e "s\|{{MODULE}}\|$MODULE\|g" \
	-e "s\|{{LIBERTY_FILE}}\|$LIBERTY_FILE\|g" \
	-e "s\|{{LIBERTY_USED}}\|$LIBERTY_USED\|g"\
	"./yosys/${yosys_file}.ys")

	# Apply additional sed expressions based on DEPTH value
	if [[ $depth -eq 0 ]]; then
	sed_command=$(echo "$sed_command" \| sed -e "/#IF {{DEPTH}}==0/d" \
	-e "/#ELSE/,/#END/d")
	elif [[ $depth -eq 1 ]]; then
	sed_command=$(echo "$sed_command" \| sed -e "/#IF {{DEPTH}}==0/,/#ELSE/d" \
	-e "/#END/d")
	fi

	# Write the result to a temp file and run yosys
	echo "$sed_command" > "./temp/${yosys_file}_temp.ys"
	yosys $additional_yosys_args "./temp/${yosys_file}_temp.ys"
	}

	#Switch between 3T and 4T pass through gates
	switch_liberty() {
	if [ "$LIBERTY_FILE" == "nem_basic_yosys.lib" ]; then
	LIBERTY_FILE="nem_basic_yosys_extended.lib"
	LIBERTY_USED="4T"
	echo "Now using extended (4T devices) libary"
	elif [ "$LIBERTY_FILE" == "nem_basic_yosys_extended.lib" ]; then
	LIBERTY_FILE="nem_basic_yosys.lib"
	LIBERTY_USED="3T"
	echo "Now using normal libary"
	else
	echo "Unknown LIBERTY_FILE value: $LIBERTY_FILE"
	fi
	}

	compare_area() {
	# Extract area values from .stat files
	local area_3T=$(grep "Chip area for module" "./temp/${FILE_BASENAME}_3T.stat" \| awk '{print $6}')
	local area_4T=$(grep "Chip area for module" "./temp/${FILE_BASENAME}_4T.stat" \| awk '{print $6}')
	+ local area_MUX=$(grep "Chip area for module" "./temp/${FILE_BASENAME}_MUX.stat" \| awk '{print $6}')

	# Calculate ratio as (area_3T / area_4T) * 100
	- local ratio=$(echo "($area_4T / $area_3T)" \| bc -l)
	+ local ratio_4T=$(echo "($area_4T / $area_3T)" \| bc -l)
	+ local ratio_MUX=$(echo "($area_MUX / $area_3T)" \| bc -l)

	{
	+ echo "------------- normal 3T ---------------"
	cat "./temp/${FILE_BASENAME}_3T.stat"
	+ echo "------------- 4T ---------------"
	cat "./temp/${FILE_BASENAME}_4T.stat"
	+ echo "------------- Muxig ---------------"
	+ cat "./temp/${FILE_BASENAME}_MUX.stat"
	+ echo "------------- Stats ---------------"
	echo "Area 3T: $area_3T"
	echo "Area 4T: $area_4T"
	- echo "Ratio 4T->3T: $ratio%"
	+ echo "Ratio 4T->3T: $ratio_4T%"
	+ echo "Area MUX: $area_MUX"
	+ echo "Ratio MUX->3T: $ratio_MUX%"
	+
	+ ec
	} > "./output/${FILE_BASENAME}.ratio"

	# Output the areas and the ratio
	- echo "Area 3T: $area_3T, Area 4T: $area_4T, ratio 4T->3T: $ratio"
	+ echo "Area 3T: $area_3T, Area 4T: $area_4T, Ratio 4T->3T: $ratio_4T, Area MUX: $area_MUX, Ratio MUX->3T: $ratio_MUX%"
	}

	create_report() {

	# Output CSV file name
	csv_output="./output/output_report.csv"

	# Clear the CSV file by redirecting an empty string to it
	> "$csv_output"

	# Write the CSV header
	echo "Module,3T,4T,Ratio" > "$csv_output"
	# Print the header of the table
	-printf "%-20s %-20s %-20s %-20s\n" "Module" "3T" "4T" "Ratio"
	-printf "%-20s %-20s %-20s %-20s\n" "-------" "------" "------" "-----"
	+printf "%-20s %-20s %-20s %-20s %-20s %-20s\n" "Module" "3T" "4T" "Ratio 4T" "MUX" "Ratio MUx"
	+printf "%-20s %-20s %-20s %-20s %-20s %-20s\n" "-------" "------" "------" "-----" "-----" "-----"

	# Loop through each .ratio file in the directory
	for file in ./output/*.ratio; do
	# Check if the file exists
	if [[ -f "$file" ]]; then
	# Extract the module name
	module_name=$(grep -m 1 -oP '(?<==== ).*(?= ===)' "$file") # Extract the module name

	# Extract areas using grep and sed
	area1=$(grep "Chip area for module" "$file" \| sed -n '1s/.*: //p') # Area 3T
	area2=$(grep "Chip area for module" "$file" \| sed -n '2s/.*: //p') # Area 4T
	-
	+ area3=$(grep "Chip area for module" "$file" \| sed -n '3s/.*: //p') # Area MUX
	+
	# Extract the ratio
	- ratio=$(grep -oP '(?<=Ratio 4T->3T: )[\d.]+' "$file") # Extract the ratio
	-
	+ ratio_4T=$(grep -oP '(?<=Ratio 4T->3T: )[\d.]+' "$file") # Extract the ratio
	+ ratio_MUX=$(grep -oP '(?<=Ratio MUX->3T: )[\d.]+' "$file") # Extract the ratio
	# Append the data to the CSV file
	- echo "$module_name,$area1,$area2,$ratio" >> "$csv_output"
	+ echo "$module_name,$area1,$area2,$ratio_4T,$area3,$ratio_MUX" >> "$csv_output"

	# Print the results in the table format
	printf "%-20s %-20s %-20s %-20s\n" "$module_name" "$area1" "$area2" "$ratio"
	fi
	done
	}


	#START ACTUAL EXECUTION

	#Check if in menu mode or in CLI mode
	if [ -z "$1" ]; then
	# in menu mode
	request_data
	else

	#in cli mode. Filter through all the parameters
	while getopts ":d:f:m:v:x:r:" opt; do
	case $opt in
	d) # -d option for directory
	file_directory="$OPTARG"
	;;
	f) # -f option for file
	FILE="$OPTARG"
	;;
	m) # -m option for module (requires -f to be set)
	MODULE="$OPTARG"
	;;
	v) # -v visualize before and after synthesis
	echo "found visualize"
	visualize=1
	;;
	x) # -x switch to extended nem liberty file
	echo "switching to 4T libert file"
	switch_liberty
	;;
	r) # -r generate report of output
	echo "generating report"
	create_report
	;;
	\?) # Invalid option
	echo "Invalid option: -$OPTARG" >&2
	usage
	;;
	:) # Missing argument for an option
	echo "Option -$OPTARG requires an argument." >&2
	usage
	;;
	esac
	done

	#running synthesis on al lthe files in the directory
	if [ -n "$file_directory" ]; then
	if [ -d "$file_directory" ]; then
	echo "Directory exists: $file_directory"

	for file in "$file_directory"/*.v; do
	# Check if it's a regular file
	if [ -f "$file" ]; then
	# Use grep to find the line that starts with 'module' and extract the module name
	module_name=$(grep -m 1 -oP '^module\s+\K\w+' "$file")

	# If the module name is found, print the file path and the module name
	if [ -n "$module_name" ]; then
	echo "File: $file"
	echo "Module: $module_name"
	echo

	FILE=$file
	FILE_BASENAME=$(basename "$FILE" \| cut -d. -f1)
	MODULE=$module_name

	#synthesise the file
	echo "running sequence of test commands"
	run_yosys_file "synth_nem" 0
	#run_yosys_file "sat_test" 0
	switch_liberty
	run_yosys_file "synth_nem" 0
	#run_yosys_file "sat_test" 0
	+ run_yosys_file "bruteforce" 0
	compare_area
	switch_liberty
	else
	echo "No module found in file: $file"
	echo
	fi
	fi
	done

	#done with synthesis
	create_report
	exit 0

	else
	echo "Directory does not exist: $file_directory"
	exit 1
	fi
	fi

	#running synthesis on the file requested
	if [ -n "$FILE" ]; then
	if [ -n "$MODULE" ]; then
	if [ -f "$FILE" ]; then
	echo "File exists: $file"
	echo "Module: $module"
	FILE_BASENAME=$(basename "$FILE" \| cut -d. -f1)
	run_yosys_file "synth_nem" 0
	if [ "$visualize" -eq 1 ]; then
	run_yosys_file "visual" 0
	run_yosys_file "visual" 1
	else
	echo "no visualize set"
	fi
	exit 0
	else
	echo "File does not exist: $file"
	exit 1
	fi
	else
	echo "Missing module (-m) for the file (-f)."
	usage
	fi
	fi
	exit 1

	fi


	# Loop to allow multiple selections
	while true; do
	show_menu
	read -p "Enter your choices (e.g., 1 2 3, or 0 to finish): " -a choices

	for choice in "${choices[@]}"; do
	case $choice in
	1)
	echo "performing synthesis"
	run_yosys_file "synth_nem" 0
	;;
	2)
	echo "Plotting the initial design with $FILE and $MODULE"
	run_yosys_file "visual" 0
	;;
	3)
	echo "Plotting the NEM design with $FILE and $MODULE"
	run_yosys_file "visual" 1
	;;
	4)
	echo "Performing SAT test on $FILE and $MODULE"
	run_yosys_file "sat_test" 0
	;;
	5)
	echo "Exporting FSM overview of the design"
	make clean #to make sure no previous .kiss2 file remains
	run_yosys_file "fsm_export" 0

	if [ -f "./temp/${FILE_BASENAME}.kiss2" ]; then
	# If the file exists, run the python script and xdot
	python3 ./yosys/kiss2dot.py ./temp/${FILE_BASENAME}.kiss2 > ./temp/${FILE_BASENAME}.dot
	xdot ./temp/${FILE_BASENAME}.dot
	else
	# If the file doesn't exist, print a message
	echo "Could not detect an FSM in ${MODULE}"
	fi
	;;
	6)
	echo "Plotting the initial design with $FILE and $MODULE"
	make clean #Clean directories
	run_yosys_file "synth_nem" 0
	make all #build plugins
	ls ./plugins/*.so
	run_yosys_file "start_shell" 0 "$(for so_file in ./plugins/*.so; do echo -m "$so_file"; done)" #create a list of all plugins to load
	;;
	7)
	echo "Switching libary"
	switch_liberty
	;;
	8)
	echo "running sequence of test commands"
	run_yosys_file "synth_nem" 0
	- run_yosys_file "visual" 1
	+ #run_yosys_file "visual" 1
	switch_liberty
	run_yosys_file "synth_nem" 0
	- run_yosys_file "visual" 1
	+ #run_yosys_file "visual" 1
	+ run_yosys_file "bruteforce" 0
	compare_area
	;;
	9)
	echo "Exporting PLA file for bruteforce"
	run_yosys_file "bruteforce" 0
	;;
	10)
	echo "requesting new module"
	request_data
	;;
	0)
	echo "exiting"
	break 2
	;;
	*)
	echo "Invalid choice. Please select a number between 1 and 6."
	;;
	esac
	done

	echo
	done
	diff --git a/sources/ISCAS85/c1355/c1355.v b/sources/ISCAS85/c1355.v
	similarity index 100%
	rename from sources/ISCAS85/c1355/c1355.v
	rename to sources/ISCAS85/c1355.v
	diff --git a/sources/ISCAS85/c17/c17.v b/sources/ISCAS85/c17.v
	similarity index 100%
	rename from sources/ISCAS85/c17/c17.v
	rename to sources/ISCAS85/c17.v
	diff --git a/sources/ISCAS85/c1908/c1908.v b/sources/ISCAS85/c1908.v
	similarity index 100%
	rename from sources/ISCAS85/c1908/c1908.v
	rename to sources/ISCAS85/c1908.v
	diff --git a/sources/ISCAS85/c2670/c2670.v b/sources/ISCAS85/c2670.v
	similarity index 100%
	rename from sources/ISCAS85/c2670/c2670.v
	rename to sources/ISCAS85/c2670.v
	diff --git a/sources/ISCAS85/c3540/c3540.v b/sources/ISCAS85/c3540.v
	similarity index 100%
	rename from sources/ISCAS85/c3540/c3540.v
	rename to sources/ISCAS85/c3540.v
	diff --git a/sources/ISCAS85/c432/c432.v b/sources/ISCAS85/c432.v
	similarity index 100%
	rename from sources/ISCAS85/c432/c432.v
	rename to sources/ISCAS85/c432.v
	diff --git a/sources/ISCAS85/c499/c499.v b/sources/ISCAS85/c499.v
	similarity index 100%
	rename from sources/ISCAS85/c499/c499.v
	rename to sources/ISCAS85/c499.v
	diff --git a/sources/ISCAS85/c5315/c5315.v b/sources/ISCAS85/c5315.v
	similarity index 100%
	rename from sources/ISCAS85/c5315/c5315.v
	rename to sources/ISCAS85/c5315.v
	diff --git a/sources/ISCAS85/c6288/c6288.v b/sources/ISCAS85/c6288.v
	similarity index 100%
	rename from sources/ISCAS85/c6288/c6288.v
	rename to sources/ISCAS85/c6288.v
	diff --git a/sources/ISCAS85/c7552/c7552.v b/sources/ISCAS85/c7552.v
	similarity index 100%
	rename from sources/ISCAS85/c7552/c7552.v
	rename to sources/ISCAS85/c7552.v
	diff --git a/sources/ISCAS85/c880/c880.v b/sources/ISCAS85/c880.v
	similarity index 100%
	rename from sources/ISCAS85/c880/c880.v
	rename to sources/ISCAS85/c880.v
	diff --git a/sources/test_set/half_adder.v b/sources/test_set/half_adder.v
	new file mode 100644
	index 0000000..5c1bd5f
	--- /dev/null
	+++ b/sources/test_set/half_adder.v
	@@ -0,0 +1,11 @@
	+module half_adder (A, B, S, Co);
	+
	+input A;
	+input B;
	+output S;
	+output Co;
	+wire[1:0] Sum5;
	+assign Sum5 = A + B;
	+assign S = Sum5[0] ;
	+assign Co = Sum5[1] ;
	+endmodule
	diff --git a/yosys/bruteforce.ys b/yosys/bruteforce.ys
	index bcec60a..5231a6c 100644
	--- a/yosys/bruteforce.ys
	+++ b/yosys/bruteforce.ys
	@@ -1,31 +1,38 @@
	read_verilog {{FILE}}

	#map to basic cells
	techmap
	+opt;;

	write_blif ./temp/{{FILE_BASENAME}}.blif
	-#abc -liberty ./{{LIBERTY_FILE}} -script "+strash; &get -n; collapse; write_eqn ./temp/{{FILE_BASENAME}}.eqn; write_truth ./temp/{{FILE_BASENAME}}.truth; write_pla ./temp/{{FILE_BASENAME}}.pla"
	+abc -liberty ./{{LIBERTY_FILE}} -script "+strash; &get -n; collapse; write_eqn ./temp/{{FILE_BASENAME}}.eqn;"
	delete

	exec -- ./mockturtle/build/experiments/muxig_rewriting ./temp/{{FILE_BASENAME}}.blif
	exec -- python3 ./yosys/map_ports.py ./temp/{{FILE_BASENAME}}.blif ./temp/{{FILE_BASENAME}}_mockturtle.blif

	read_blif ./temp/mapped_{{FILE_BASENAME}}_mockturtle.blif

	rename top {{MODULE}}_nem

	techmap -map ./yosys/mockturtle_map.v
	-clean
	+
	techmap

	-clean
	-opt
	-clean
	+opt_expr
	+
	+clean -purge
	+
	+
	+

	abc -liberty {{LIBERTY_FILE}} -script "+attach"

	-clean
	+clean -purge
	+
	+
	+

	write_verilog -selected ./temp/{{FILE_BASENAME}}_nem.v
	#Output stats
	-tee -o ./temp/{{FILE_BASENAME}}_{{LIBERTY_USED}}.stat stat -liberty ./{{LIBERTY_FILE}}
	+tee -o ./temp/{{FILE_BASENAME}}_MUX.stat stat -liberty ./{{LIBERTY_FILE}}
	diff --git a/yosys/mockturtle_map.v b/yosys/mockturtle_map.v
	index f0d0b4b..e86bf94 100644
	--- a/yosys/mockturtle_map.v
	+++ b/yosys/mockturtle_map.v
	@@ -1,51 +1,64 @@
	(* techmap_celltype = "$lut" *)
	module \$lut_1 (A, Y);
	parameter LUT = 0;
	parameter WIDTH = 3;

	wire _TECHMAP_FAIL_ = (WIDTH != 3) \|\| LUT != 8'b11100100;

	input [WIDTH-1:0] A;
	output Y;

	$mux #(.WIDTH(1)) switch_mux_1 (.A(A[2]),.B(A[1]),.S(~A[0]),.Y(Y));
	endmodule

	(* techmap_celltype = "$lut" *)
	module \$lut_2 (A, Y);
	parameter LUT = 0;
	parameter WIDTH = 3;

	- wire _TECHMAP_FAIL_ = (WIDTH != 3) \|\| LUT != 8'b01001110;
	+ wire _TECHMAP_FAIL_ = (WIDTH != 3) \|\| LUT != 8'b01001110;

	input [WIDTH-1:0] A;
	output Y;

	$mux #(.WIDTH(1)) switch_mux_2 (.A(~A[2]),.B(A[1]),.S(~A[0]),.Y(Y));
	endmodule

	(* techmap_celltype = "$lut" *)
	module \$lut_3 (A, Y);
	parameter LUT = 0;
	parameter WIDTH = 3;

	wire _TECHMAP_FAIL_ = (WIDTH != 3) \|\| LUT != 8'b10001101;

	input [WIDTH-1:0] A;
	output Y;

	$mux #(.WIDTH(1)) switch_mux_3 (.A(~A[2]),.B(A[1]),.S(A[0]),.Y(Y));
	endmodule

	(* techmap_celltype = "$lut" *)
	module \$lut_4 (A, Y);
	parameter LUT = 0;
	parameter WIDTH = 3;

	+ wire _TECHMAP_FAIL_ = (WIDTH != 3) \|\| LUT != 8'b11011000;
	+
	+ input [WIDTH-1:0] A;
	+ output Y;
	+
	+ $mux #(.WIDTH(1)) switch_mux_2 (.A(A[2]),.B(A[1]),.S(A[0]),.Y(Y));
	+endmodule
	+
	+(* techmap_celltype = "$lut" *)
	+module \$lut_5 (A, Y);
	+ parameter LUT = 0;
	+ parameter WIDTH = 3;
	+
	wire _TECHMAP_FAIL_ = (WIDTH != 1) \|\| LUT != 2'b01;

	input [WIDTH-1:0] A;
	output Y;

	assign Y = ~A;
	endmodule
	\ No newline at end of file

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