module divider1 #(parameter BITWIDTH = 1) (A, B, Q, R, valid);

    // Input and Output Declarations
    input [BITWIDTH-1:0] A;       // A is the dividend
    input [BITWIDTH-1:0] B;       // B is the divisor
    output reg [BITWIDTH-1:0] Q;   // Q is the quotient
    output reg [BITWIDTH-1:0] R;   // R is the remainder
    output reg valid;               // Valid signal to indicate division is successful

    // Division Process
    always @* begin
        if (B == 0) begin
            Q = {BITWIDTH{1'bx}};   // Undefined if divisor is zero
            R = {BITWIDTH{1'bx}};   // Undefined if divisor is zero
            valid = 0;              // Invalid operation
        end else begin
            Q = A / B;              // Calculate the quotient
            R = A % B;              // Calculate the remainder
            valid = 1;              // Division is valid
        end
    end

endmodule