------------- normal 3T --------------- yosys> stat -liberty ./nem_liberty/nem_basic_yosys.lib 14. Printing statistics. === c880_nem === Number of wires: 328 Number of wire bits: 328 Number of public wires: 86 Number of public wire bits: 86 Number of ports: 86 Number of port bits: 86 Number of memories: 0 Number of memory bits: 0 Number of processes: 0 Number of cells: 268 and_3T 30 inv_3T 14 nand_3T 119 nor_3T 77 or_3T 2 xnor_3T 13 xor_3T 13 Chip area for module '\c880_nem': 900000.000000 of which used for sequential elements: 0.000000 (0.00%) ------------- 4T --------------- yosys> stat -liberty ./nem_liberty/nem_basic_yosys_extended.lib 14. Printing statistics. === c880_nem === Number of wires: 316 Number of wire bits: 316 Number of public wires: 86 Number of public wire bits: 86 Number of ports: 86 Number of port bits: 86 Number of memories: 0 Number of memory bits: 0 Number of processes: 0 Number of cells: 256 and_4T 120 and_not_4T 13 inv_3T 2 nand_4T 1 or_4T 82 or_not_4T 5 xnor_4T 12 xor_4T 21 Chip area for module '\c880_nem': 368912.000000 of which used for sequential elements: 0.000000 (0.00%) ------------- Muxig --------------- ------------- Stats --------------- Area 3T: 900000.000000 Area 4T: 368912.000000 Ratio 4T->3T: .40990222222222222222% Area MUX: Ratio MUX->3T: %