diff --git a/ISCAS_but_muxig/c1355.ratio b/ISCAS_but_muxig/c1355.ratio new file mode 100644 index 0000000..10eb8c3 --- /dev/null +++ b/ISCAS_but_muxig/c1355.ratio @@ -0,0 +1,85 @@ +------------- normal 3T --------------- + +yosys> stat -liberty ./nem_liberty/nem_basic_yosys.lib + +14. Printing statistics. + +=== c1355_nem === + + Number of wires: 227 + Number of wire bits: 227 + Number of public wires: 73 + Number of public wire bits: 73 + Number of ports: 73 + Number of port bits: 73 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 186 + and_3T 2 + inv_3T 5 + nand_3T 41 + nor_3T 30 + or_3T 3 + xnor_3T 77 + xor_3T 28 + + Chip area for module '\c1355_nem': 1048072.000000 + of which used for sequential elements: 0.000000 (0.00%) + +------------- 4T --------------- + +yosys> stat -liberty ./nem_liberty/nem_basic_yosys_extended.lib + +14. Printing statistics. + +=== c1355_nem === + + Number of wires: 221 + Number of wire bits: 221 + Number of public wires: 73 + Number of public wire bits: 73 + Number of ports: 73 + Number of port bits: 73 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 180 + and_4T 49 + and_not_4T 18 + inv_3T 1 + or_4T 7 + xnor_4T 91 + xor_4T 14 + + Chip area for module '\c1355_nem': 353512.000000 + of which used for sequential elements: 0.000000 (0.00%) + +------------- Muxig --------------- + +16. Printing statistics. + +=== c1355_nem === + + Number of wires: 904 + Number of wire bits: 904 + Number of public wires: 73 + Number of public wire bits: 73 + Number of ports: 73 + Number of port bits: 73 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 863 + inv_3T 359 + mux_4T 504 + + Chip area for module '\c1355_nem': 1065592.000000 + of which used for sequential elements: 0.000000 (0.00%) + +------------- Stats --------------- +Area 3T: 1048072.000000 +Area 4T: 353512.000000 +Ratio 4T->3T: .33729743758062423192% +Area MUX: 1065592.000000 +Ratio MUX->3T: 1.01671640879634223602% diff --git a/ISCAS_but_muxig/c17.ratio b/ISCAS_but_muxig/c17.ratio new file mode 100644 index 0000000..8edc515 --- /dev/null +++ b/ISCAS_but_muxig/c17.ratio @@ -0,0 +1,76 @@ +------------- normal 3T --------------- + +yosys> stat -liberty ./nem_liberty/nem_basic_yosys.lib + +14. Printing statistics. + +=== c17_nem === + + Number of wires: 11 + Number of wire bits: 11 + Number of public wires: 7 + Number of public wire bits: 7 + Number of ports: 7 + Number of port bits: 7 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 6 + nand_3T 6 + + Chip area for module '\c17_nem': 16992.000000 + of which used for sequential elements: 0.000000 (0.00%) + +------------- 4T --------------- + +yosys> stat -liberty ./nem_liberty/nem_basic_yosys_extended.lib + +14. Printing statistics. + +=== c17_nem === + + Number of wires: 11 + Number of wire bits: 11 + Number of public wires: 7 + Number of public wire bits: 7 + Number of ports: 7 + Number of port bits: 7 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 6 + and_4T 2 + and_not_4T 2 + or_4T 2 + + Chip area for module '\c17_nem': 7728.000000 + of which used for sequential elements: 0.000000 (0.00%) + +------------- Muxig --------------- + +16. Printing statistics. + +=== c17_nem === + + Number of wires: 17 + Number of wire bits: 17 + Number of public wires: 7 + Number of public wire bits: 7 + Number of ports: 7 + Number of port bits: 7 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 12 + inv_3T 6 + mux_4T 6 + + Chip area for module '\c17_nem': 14688.000000 + of which used for sequential elements: 0.000000 (0.00%) + +------------- Stats --------------- +Area 3T: 16992.000000 +Area 4T: 7728.000000 +Ratio 4T->3T: .45480225988700564971% +Area MUX: 14688.000000 +Ratio MUX->3T: .86440677966101694915% diff --git a/ISCAS_but_muxig/c1908.ratio b/ISCAS_but_muxig/c1908.ratio new file mode 100644 index 0000000..54b84de --- /dev/null +++ b/ISCAS_but_muxig/c1908.ratio @@ -0,0 +1,89 @@ +------------- normal 3T --------------- + +yosys> stat -liberty ./nem_liberty/nem_basic_yosys.lib + +14. Printing statistics. + +=== c1908_nem === + + Number of wires: 253 + Number of wire bits: 253 + Number of public wires: 58 + Number of public wire bits: 58 + Number of ports: 58 + Number of port bits: 58 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 220 + and_3T 12 + inv_3T 9 + mux_3T 2 + nand_3T 58 + nor_3T 54 + or_3T 11 + xnor_3T 58 + xor_3T 16 + + Chip area for module '\c1908_nem': 1013016.000000 + of which used for sequential elements: 0.000000 (0.00%) + +------------- 4T --------------- + +yosys> stat -liberty ./nem_liberty/nem_basic_yosys_extended.lib + +14. Printing statistics. + +=== c1908_nem === + + Number of wires: 246 + Number of wire bits: 246 + Number of public wires: 58 + Number of public wire bits: 58 + Number of ports: 58 + Number of port bits: 58 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 213 + and_4T 48 + and_not_4T 21 + inv_3T 4 + mux_4T 2 + nor_3T 1 + or_4T 39 + or_not_4T 26 + xnor_4T 56 + xor_4T 16 + + Chip area for module '\c1908_nem': 358896.000000 + of which used for sequential elements: 0.000000 (0.00%) + +------------- Muxig --------------- + +16. Printing statistics. + +=== c1908_nem === + + Number of wires: 659 + Number of wire bits: 659 + Number of public wires: 58 + Number of public wire bits: 58 + Number of ports: 58 + Number of port bits: 58 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 626 + inv_3T 212 + mux_4T 414 + + Chip area for module '\c1908_nem': 779152.000000 + of which used for sequential elements: 0.000000 (0.00%) + +------------- Stats --------------- +Area 3T: 1013016.000000 +Area 4T: 358896.000000 +Ratio 4T->3T: .35428463123978298467% +Area MUX: 779152.000000 +Ratio MUX->3T: .76914086253326699677% diff --git a/ISCAS_but_muxig/c2670.ratio b/ISCAS_but_muxig/c2670.ratio new file mode 100644 index 0000000..d232ad4 --- /dev/null +++ b/ISCAS_but_muxig/c2670.ratio @@ -0,0 +1,89 @@ +------------- normal 3T --------------- + +yosys> stat -liberty ./nem_liberty/nem_basic_yosys.lib + +14. Printing statistics. + +=== c2670_nem === + + Number of wires: 692 + Number of wire bits: 692 + Number of public wires: 373 + Number of public wire bits: 373 + Number of ports: 373 + Number of port bits: 373 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 369 + and_3T 30 + inv_3T 31 + mux_3T 64 + nand_3T 103 + nor_3T 81 + or_3T 16 + xnor_3T 33 + xor_3T 11 + + Chip area for module '\c2670_nem': 1593896.000000 + of which used for sequential elements: 0.000000 (0.00%) + +------------- 4T --------------- + +yosys> stat -liberty ./nem_liberty/nem_basic_yosys_extended.lib + +14. Printing statistics. + +=== c2670_nem === + + Number of wires: 680 + Number of wire bits: 680 + Number of public wires: 373 + Number of public wire bits: 373 + Number of ports: 373 + Number of port bits: 373 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 357 + and_4T 89 + and_not_4T 21 + inv_3T 28 + mux_4T 65 + nand_4T 1 + or_4T 61 + or_not_4T 44 + xnor_4T 32 + xor_4T 16 + + Chip area for module '\c2670_nem': 513072.000000 + of which used for sequential elements: 0.000000 (0.00%) + +------------- Muxig --------------- + +16. Printing statistics. + +=== c2670_nem === + + Number of wires: 1441 + Number of wire bits: 1441 + Number of public wires: 373 + Number of public wire bits: 373 + Number of ports: 373 + Number of port bits: 373 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 1122 + inv_3T 405 + mux_4T 717 + + Chip area for module '\c2670_nem': 1393296.000000 + of which used for sequential elements: 0.000000 (0.00%) + +------------- Stats --------------- +Area 3T: 1593896.000000 +Area 4T: 513072.000000 +Ratio 4T->3T: .32189804102651615914% +Area MUX: 1393296.000000 +Ratio MUX->3T: .87414486265101361694% diff --git a/ISCAS_but_muxig/c3540.ratio b/ISCAS_but_muxig/c3540.ratio new file mode 100644 index 0000000..9f6ddd6 --- /dev/null +++ b/ISCAS_but_muxig/c3540.ratio @@ -0,0 +1,88 @@ +------------- normal 3T --------------- + +yosys> stat -liberty ./nem_liberty/nem_basic_yosys.lib + +14. Printing statistics. + +=== c3540_nem === + + Number of wires: 882 + Number of wire bits: 882 + Number of public wires: 72 + Number of public wire bits: 72 + Number of ports: 72 + Number of port bits: 72 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 832 + and_3T 68 + inv_3T 32 + mux_3T 28 + nand_3T 397 + nor_3T 237 + or_3T 32 + xnor_3T 29 + xor_3T 9 + + Chip area for module '\c3540_nem': 2746400.000000 + of which used for sequential elements: 0.000000 (0.00%) + +------------- 4T --------------- + +yosys> stat -liberty ./nem_liberty/nem_basic_yosys_extended.lib + +14. Printing statistics. + +=== c3540_nem === + + Number of wires: 830 + Number of wire bits: 830 + Number of public wires: 72 + Number of public wire bits: 72 + Number of ports: 72 + Number of port bits: 72 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 780 + and_4T 202 + and_not_4T 148 + inv_3T 17 + mux_4T 46 + or_4T 258 + or_not_4T 62 + xnor_4T 33 + xor_4T 14 + + Chip area for module '\c3540_nem': 1056984.000000 + of which used for sequential elements: 0.000000 (0.00%) + +------------- Muxig --------------- + +16. Printing statistics. + +=== c3540_nem === + + Number of wires: 1566 + Number of wire bits: 1566 + Number of public wires: 72 + Number of public wire bits: 72 + Number of ports: 72 + Number of port bits: 72 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 1516 + inv_3T 478 + mux_4T 1038 + + Chip area for module '\c3540_nem': 1891424.000000 + of which used for sequential elements: 0.000000 (0.00%) + +------------- Stats --------------- +Area 3T: 2746400.000000 +Area 4T: 1056984.000000 +Ratio 4T->3T: .38486163705214098456% +Area MUX: 1891424.000000 +Ratio MUX->3T: .68869210602971162248% diff --git a/ISCAS_but_muxig/c432.ratio b/ISCAS_but_muxig/c432.ratio new file mode 100644 index 0000000..ee8e8fb --- /dev/null +++ b/ISCAS_but_muxig/c432.ratio @@ -0,0 +1,82 @@ +------------- normal 3T --------------- + +yosys> stat -liberty ./nem_liberty/nem_basic_yosys.lib + +14. Printing statistics. + +=== c432_nem === + + Number of wires: 171 + Number of wire bits: 171 + Number of public wires: 43 + Number of public wire bits: 43 + Number of ports: 43 + Number of port bits: 43 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 135 + and_3T 8 + inv_3T 12 + nand_3T 40 + nor_3T 72 + or_3T 3 + + Chip area for module '\c432_nem': 374256.000000 + of which used for sequential elements: 0.000000 (0.00%) + +------------- 4T --------------- + +yosys> stat -liberty ./nem_liberty/nem_basic_yosys_extended.lib + +14. Printing statistics. + +=== c432_nem === + + Number of wires: 160 + Number of wire bits: 160 + Number of public wires: 43 + Number of public wire bits: 43 + Number of ports: 43 + Number of port bits: 43 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 124 + and_4T 31 + and_not_4T 30 + inv_3T 2 + or_4T 44 + or_not_4T 17 + + Chip area for module '\c432_nem': 159456.000000 + of which used for sequential elements: 0.000000 (0.00%) + +------------- Muxig --------------- + +16. Printing statistics. + +=== c432_nem === + + Number of wires: 352 + Number of wire bits: 352 + Number of public wires: 43 + Number of public wire bits: 43 + Number of ports: 43 + Number of port bits: 43 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 316 + inv_3T 107 + mux_4T 209 + + Chip area for module '\c432_nem': 393312.000000 + of which used for sequential elements: 0.000000 (0.00%) + +------------- Stats --------------- +Area 3T: 374256.000000 +Area 4T: 159456.000000 +Ratio 4T->3T: .42606130563037065538% +Area MUX: 393312.000000 +Ratio MUX->3T: 1.05091701936642298319% diff --git a/ISCAS_but_muxig/c499.ratio b/ISCAS_but_muxig/c499.ratio new file mode 100644 index 0000000..5a6518c --- /dev/null +++ b/ISCAS_but_muxig/c499.ratio @@ -0,0 +1,86 @@ +------------- normal 3T --------------- + +yosys> stat -liberty ./nem_liberty/nem_basic_yosys.lib + +14. Printing statistics. + +=== c499_nem === + + Number of wires: 225 + Number of wire bits: 225 + Number of public wires: 73 + Number of public wire bits: 73 + Number of ports: 73 + Number of port bits: 73 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 184 + and_3T 1 + inv_3T 4 + nand_3T 54 + nor_3T 14 + or_3T 6 + xnor_3T 99 + xor_3T 6 + + Chip area for module '\c499_nem': 1046360.000000 + of which used for sequential elements: 0.000000 (0.00%) + +------------- 4T --------------- + +yosys> stat -liberty ./nem_liberty/nem_basic_yosys_extended.lib + +14. Printing statistics. + +=== c499_nem === + + Number of wires: 220 + Number of wire bits: 220 + Number of public wires: 73 + Number of public wire bits: 73 + Number of ports: 73 + Number of port bits: 73 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 179 + and_4T 38 + and_not_4T 9 + inv_3T 1 + or_4T 9 + or_not_4T 17 + xnor_4T 79 + xor_4T 26 + + Chip area for module '\c499_nem': 352224.000000 + of which used for sequential elements: 0.000000 (0.00%) + +------------- Muxig --------------- + +16. Printing statistics. + +=== c499_nem === + + Number of wires: 658 + Number of wire bits: 658 + Number of public wires: 73 + Number of public wire bits: 73 + Number of ports: 73 + Number of port bits: 73 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 617 + inv_3T 217 + mux_4T 400 + + Chip area for module '\c499_nem': 766920.000000 + of which used for sequential elements: 0.000000 (0.00%) + +------------- Stats --------------- +Area 3T: 1046360.000000 +Area 4T: 352224.000000 +Ratio 4T->3T: .33661837226193661837% +Area MUX: 766920.000000 +Ratio MUX->3T: .73294086165373294086% diff --git a/ISCAS_but_muxig/c5315.ratio b/ISCAS_but_muxig/c5315.ratio new file mode 100644 index 0000000..adf7641 --- /dev/null +++ b/ISCAS_but_muxig/c5315.ratio @@ -0,0 +1,90 @@ +------------- normal 3T --------------- + +yosys> stat -liberty ./nem_liberty/nem_basic_yosys.lib + +14. Printing statistics. + +=== c5315_nem === + + Number of wires: 1203 + Number of wire bits: 1203 + Number of public wires: 301 + Number of public wire bits: 301 + Number of ports: 301 + Number of port bits: 301 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 1008 + and_3T 67 + inv_3T 74 + mux_3T 121 + nand_3T 348 + nor_3T 266 + or_3T 40 + xnor_3T 72 + xor_3T 20 + + Chip area for module '\c5315_nem': 3932680.000000 + of which used for sequential elements: 0.000000 (0.00%) + +------------- 4T --------------- + +yosys> stat -liberty ./nem_liberty/nem_basic_yosys_extended.lib + +14. Printing statistics. + +=== c5315_nem === + + Number of wires: 1158 + Number of wire bits: 1158 + Number of public wires: 301 + Number of public wire bits: 301 + Number of ports: 301 + Number of port bits: 301 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 963 + and_4T 207 + and_not_4T 86 + inv_3T 69 + mux_4T 139 + nand_4T 5 + nor_3T 2 + or_4T 244 + or_not_4T 106 + xnor_4T 75 + xor_4T 30 + + Chip area for module '\c5315_nem': 1362200.000000 + of which used for sequential elements: 0.000000 (0.00%) + +------------- Muxig --------------- + +16. Printing statistics. + +=== c5315_nem === + + Number of wires: 2885 + Number of wire bits: 2885 + Number of public wires: 301 + Number of public wire bits: 301 + Number of ports: 301 + Number of port bits: 301 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 2694 + inv_3T 921 + mux_4T 1773 + + Chip area for module '\c5315_nem': 3351984.000000 + of which used for sequential elements: 0.000000 (0.00%) + +------------- Stats --------------- +Area 3T: 3932680.000000 +Area 4T: 1362200.000000 +Ratio 4T->3T: .34637956813165576655% +Area MUX: 3351984.000000 +Ratio MUX->3T: .85234089730158568711% diff --git a/ISCAS_but_muxig/c6288.ratio b/ISCAS_but_muxig/c6288.ratio new file mode 100644 index 0000000..0b75d26 --- /dev/null +++ b/ISCAS_but_muxig/c6288.ratio @@ -0,0 +1,88 @@ +------------- normal 3T --------------- + +yosys> stat -liberty ./nem_liberty/nem_basic_yosys.lib + +14. Printing statistics. + +=== c6288_nem === + + Number of wires: 1691 + Number of wire bits: 1691 + Number of public wires: 64 + Number of public wire bits: 64 + Number of ports: 64 + Number of port bits: 64 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 1659 + and_3T 235 + inv_3T 20 + mux_3T 1 + nand_3T 331 + nor_3T 654 + or_3T 189 + xnor_3T 76 + xor_3T 153 + + Chip area for module '\c6288_nem': 6278664.000000 + of which used for sequential elements: 0.000000 (0.00%) + +------------- 4T --------------- + +yosys> stat -liberty ./nem_liberty/nem_basic_yosys_extended.lib + +14. Printing statistics. + +=== c6288_nem === + + Number of wires: 1439 + Number of wire bits: 1439 + Number of public wires: 64 + Number of public wire bits: 64 + Number of ports: 64 + Number of port bits: 64 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 1407 + and_4T 494 + and_not_4T 17 + mux_4T 1 + nand_4T 154 + or_4T 223 + or_not_4T 57 + xnor_4T 97 + xor_4T 364 + + Chip area for module '\c6288_nem': 2525616.000000 + of which used for sequential elements: 0.000000 (0.00%) + +------------- Muxig --------------- + +16. Printing statistics. + +=== c6288_nem === + + Number of wires: 4435 + Number of wire bits: 4435 + Number of public wires: 64 + Number of public wire bits: 64 + Number of ports: 64 + Number of port bits: 64 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 4403 + inv_3T 2066 + mux_4T 2337 + + Chip area for module '\c6288_nem': 5406616.000000 + of which used for sequential elements: 0.000000 (0.00%) + +------------- Stats --------------- +Area 3T: 6278664.000000 +Area 4T: 2525616.000000 +Ratio 4T->3T: .40225372786312502150% +Area MUX: 5406616.000000 +Ratio MUX->3T: .86110930605619284612% diff --git a/ISCAS_but_muxig/c7552.ratio b/ISCAS_but_muxig/c7552.ratio new file mode 100644 index 0000000..bbdd01b --- /dev/null +++ b/ISCAS_but_muxig/c7552.ratio @@ -0,0 +1,89 @@ +------------- normal 3T --------------- + +yosys> stat -liberty ./nem_liberty/nem_basic_yosys.lib + +14. Printing statistics. + +=== c7552_nem === + + Number of wires: 1292 + Number of wire bits: 1292 + Number of public wires: 315 + Number of public wire bits: 315 + Number of ports: 315 + Number of port bits: 315 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 1035 + and_3T 69 + inv_3T 82 + mux_3T 73 + nand_3T 291 + nor_3T 282 + or_3T 63 + xnor_3T 134 + xor_3T 41 + + Chip area for module '\c7552_nem': 4189960.000000 + of which used for sequential elements: 0.000000 (0.00%) + +------------- 4T --------------- + +yosys> stat -liberty ./nem_liberty/nem_basic_yosys_extended.lib + +14. Printing statistics. + +=== c7552_nem === + + Number of wires: 1168 + Number of wire bits: 1168 + Number of public wires: 315 + Number of public wire bits: 315 + Number of ports: 315 + Number of port bits: 315 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 911 + and_4T 165 + and_not_4T 102 + inv_3T 48 + mux_4T 127 + nand_4T 5 + or_4T 151 + or_not_4T 100 + xnor_4T 165 + xor_4T 48 + + Chip area for module '\c7552_nem': 1420104.000000 + of which used for sequential elements: 0.000000 (0.00%) + +------------- Muxig --------------- + +16. Printing statistics. + +=== c7552_nem === + + Number of wires: 3594 + Number of wire bits: 3594 + Number of public wires: 315 + Number of public wire bits: 315 + Number of ports: 315 + Number of port bits: 315 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 3344 + inv_3T 1270 + mux_4T 2074 + + Chip area for module '\c7552_nem': 4144512.000000 + of which used for sequential elements: 0.000000 (0.00%) + +------------- Stats --------------- +Area 3T: 4189960.000000 +Area 4T: 1420104.000000 +Ratio 4T->3T: .33893020458429197414% +Area MUX: 4144512.000000 +Ratio MUX->3T: .98915311840685829936% diff --git a/ISCAS_but_muxig/c880.ratio b/ISCAS_but_muxig/c880.ratio new file mode 100644 index 0000000..76e3aaf --- /dev/null +++ b/ISCAS_but_muxig/c880.ratio @@ -0,0 +1,87 @@ +------------- normal 3T --------------- + +yosys> stat -liberty ./nem_liberty/nem_basic_yosys.lib + +14. Printing statistics. + +=== c880_nem === + + Number of wires: 328 + Number of wire bits: 328 + Number of public wires: 86 + Number of public wire bits: 86 + Number of ports: 86 + Number of port bits: 86 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 268 + and_3T 30 + inv_3T 14 + nand_3T 119 + nor_3T 77 + or_3T 2 + xnor_3T 13 + xor_3T 13 + + Chip area for module '\c880_nem': 900000.000000 + of which used for sequential elements: 0.000000 (0.00%) + +------------- 4T --------------- + +yosys> stat -liberty ./nem_liberty/nem_basic_yosys_extended.lib + +14. Printing statistics. + +=== c880_nem === + + Number of wires: 316 + Number of wire bits: 316 + Number of public wires: 86 + Number of public wire bits: 86 + Number of ports: 86 + Number of port bits: 86 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 256 + and_4T 120 + and_not_4T 13 + inv_3T 2 + nand_4T 1 + or_4T 82 + or_not_4T 5 + xnor_4T 12 + xor_4T 21 + + Chip area for module '\c880_nem': 368912.000000 + of which used for sequential elements: 0.000000 (0.00%) + +------------- Muxig --------------- + +16. Printing statistics. + +=== c880_nem === + + Number of wires: 556 + Number of wire bits: 556 + Number of public wires: 86 + Number of public wire bits: 86 + Number of ports: 86 + Number of port bits: 86 + Number of memories: 0 + Number of memory bits: 0 + Number of processes: 0 + Number of cells: 496 + inv_3T 169 + mux_4T 327 + + Chip area for module '\c880_nem': 617216.000000 + of which used for sequential elements: 0.000000 (0.00%) + +------------- Stats --------------- +Area 3T: 900000.000000 +Area 4T: 368912.000000 +Ratio 4T->3T: .40990222222222222222% +Area MUX: 617216.000000 +Ratio MUX->3T: .68579555555555555555% diff --git a/ISCAS_but_muxig/output_report.csv b/ISCAS_but_muxig/output_report.csv new file mode 100644 index 0000000..f814c7a --- /dev/null +++ b/ISCAS_but_muxig/output_report.csv @@ -0,0 +1,12 @@ +Module,3T,4T,Ratio +c1355_nem,1048072.000000,353512.000000,.33729743758062423192,1065592.000000,1.01671640879634223602 +c17_nem,16992.000000,7728.000000,.45480225988700564971,14688.000000,.86440677966101694915 +c1908_nem,1013016.000000,358896.000000,.35428463123978298467,779152.000000,.76914086253326699677 +c2670_nem,1593896.000000,513072.000000,.32189804102651615914,1393296.000000,.87414486265101361694 +c3540_nem,2746400.000000,1056984.000000,.38486163705214098456,1891424.000000,.68869210602971162248 +c432_nem,374256.000000,159456.000000,.42606130563037065538,393312.000000,1.05091701936642298319 +c499_nem,1046360.000000,352224.000000,.33661837226193661837,766920.000000,.73294086165373294086 +c5315_nem,3932680.000000,1362200.000000,.34637956813165576655,3351984.000000,.85234089730158568711 +c6288_nem,6278664.000000,2525616.000000,.40225372786312502150,5406616.000000,.86110930605619284612 +c7552_nem,4189960.000000,1420104.000000,.33893020458429197414,4144512.000000,.98915311840685829936 +c880_nem,900000.000000,368912.000000,.40990222222222222222,617216.000000,.68579555555555555555