diff --git a/nem_basic_yosys_extended.lib b/nem_basic_yosys_extended.lib index 618eceb..6253d69 100644 --- a/nem_basic_yosys_extended.lib +++ b/nem_basic_yosys_extended.lib @@ -1,2604 +1,2604 @@ library (nem_basic) { comment : "Manually created liberty with more gates - ignore any timing information"; date : "$April 26th 2024$"; revision : "0.2"; delay_model : table_lookup; capacitive_load_unit (1,pf); time_unit : "1ns"; current_unit : "1uA"; voltage_unit : "1V"; voltage_map (VCC,15); voltage_map (GND,0); default_cell_leakage_power : 0; default_fanout_load : 1; default_max_transition : 500; default_output_pin_cap : 0; input_threshold_pct_rise : 50.0; input_threshold_pct_fall : 50.0; output_threshold_pct_rise : 50.0; output_threshold_pct_fall : 50.0; slew_lower_threshold_pct_rise : 20.0; slew_lower_threshold_pct_fall : 20.0; slew_upper_threshold_pct_rise : 80.0; slew_upper_threshold_pct_fall : 80.0; slew_derate_from_library : 1.0; nom_process : 1; nom_temperature : 125; nom_voltage : 15; operating_conditions (NEM_BASIC_COND) { process : 1; temperature : 125; voltage : 29; } default_operating_conditions : NEM_BASIC_COND; lu_table_template (delay_template_2x2) { variable_1 : input_net_transition; variable_2 : total_output_net_capacitance; index_1("0.01,0.1"); index_2("0.02,0.2"); } lu_table_template (constraint_template_2x2) { variable_1 : constrained_pin_transition; variable_2 : related_pin_transition; index_1("0.01,0.1"); index_2("0.02,0.2"); } cell(inv_3T) { area : 1160; cell_footprint : inv_3T; /* cell_description : "NEM 3T Inverter"; */ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } pin (in) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (out) { direction : "output"; related_ground_pin : GND; related_power_pin : VCC; function : "!(in)"; max_capacitance : 10; max_fanout : 10; max_transition : 500; timing () { related_pin : "in"; timing_sense : negative_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } } cell(buf_3T) { area : 2240; cell_footprint : buf_3T; /* cell_description : "NEM 3T Buffer"; */ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } pin (in) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (out) { direction : "output"; related_ground_pin : GND; related_power_pin : VCC; function : "in"; max_capacitance : 10; max_fanout : 10; max_transition : 500; timing () { related_pin : "in"; timing_sense : positive_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } } cell(nand_3T) { area : 2832; cell_footprint : nand_3T; /* cell_description : "NEM 3T 2-Input NAND"; */ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } pin (a) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (b) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (out) { direction : "output"; related_ground_pin : GND; related_power_pin : VCC; function : "!(a&b)"; max_fanout : 10; timing () { related_pin : "a"; timing_sense : negative_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } timing () { related_pin : "b"; timing_sense : negative_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } } cell(and_3T) { area : 3912; cell_footprint : and_3T; /* cell_description : "NEM 3T 2-Input AND"; */ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } pin (a) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (b) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (out) { direction : "output"; related_ground_pin : GND; related_power_pin : VCC; function : "a&b"; max_fanout : 10; timing () { related_pin : "a"; timing_sense : positive_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } timing () { related_pin : "b"; timing_sense : positive_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } } cell(nor_3T) { area : 2832; cell_footprint : nor_3T; /* cell_description : "NEM 3T 2-Input NOR"; */ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } pin (a) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (b) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (out) { direction : "output"; related_ground_pin : GND; related_power_pin : VCC; function : "!(a|b)"; max_fanout : 10; timing () { related_pin : "a"; timing_sense : negative_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } timing () { related_pin : "b"; timing_sense : negative_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } } cell(or_3T) { area : 3952; cell_footprint : or_3T; /* cell_description : "NEM 3T 2-Input OR"; */ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } pin (a) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (b) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (out) { direction : "output"; related_ground_pin : GND; related_power_pin : VCC; function : "a|b"; max_fanout : 10; timing () { related_pin : "a"; timing_sense : positive_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } timing () { related_pin : "b"; timing_sense : positive_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } } cell(xnor_3T) { area : 7824; cell_footprint : xnor_3T; /* cell_description : "NEM 3T 2-Input XNOR"; */ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } pin (a) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (b) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (out) { direction : "output"; related_ground_pin : GND; related_power_pin : VCC; function : "!(a^b)"; max_fanout : 10; timing () { related_pin : "a"; timing_sense : non_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } timing () { related_pin : "b"; timing_sense : non_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } } cell(xor_3T) { area : 7824; cell_footprint : xor_3T; /* cell_description : "NEM 3T 2-Input XOR"; */ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } pin (a) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (b) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (out) { direction : "output"; related_ground_pin : GND; related_power_pin : VCC; function : "a^b"; max_fanout : 10; timing () { related_pin : "a"; timing_sense : non_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } timing () { related_pin : "b"; timing_sense : non_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } } cell(mux_3T) { area : 8000; cell_footprint : mux_3T; /* cell_description : "NEM 3T 2-Input MUX"; */ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } /*bundle(in) { members(in_0,in_1); direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; }*/ pin(in_0){ direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin(in_1){ direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (sel) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (out) { direction : "output"; related_ground_pin : GND; related_power_pin : VCC; function : "(!sel & in_0) | (sel & in_1)"; max_fanout : 10; timing () { related_pin : "in_0"; timing_sense : positive_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } timing () { related_pin : "in_1"; timing_sense : positive_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } timing () { related_pin : "sel"; timing_sense : non_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } } cell(mux_4T) { - area : 3472; + area : 1288; cell_footprint : mux_4T; /* cell_description : "NEM 4T 2-Input MUX"; */ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } /*bundle(in) { members(in_0,in_1); direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; }*/ pin(in_0){ direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin(in_1){ direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (sel) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (out) { direction : "output"; related_ground_pin : GND; related_power_pin : VCC; function : "(!sel & in_0) | (sel & in_1)"; max_fanout : 10; timing () { related_pin : "in_0"; timing_sense : positive_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } timing () { related_pin : "in_1"; timing_sense : positive_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } timing () { related_pin : "sel"; timing_sense : non_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } } cell(and_4T) { - area : 3472; + area : 1288; cell_footprint : and_4T; /* cell_description : "NEM 4T 2-Input AND based on muxiplayers pass logic"; */ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } pin (a) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (b) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (out) { direction : "output"; related_ground_pin : GND; related_power_pin : VCC; function : "a&b"; max_fanout : 10; timing () { related_pin : "a"; timing_sense : positive_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } timing () { related_pin : "b"; timing_sense : positive_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } } cell(nand_4T) { - area : 4632; + area : 2448; cell_footprint : and_4T; /* cell_description : "NEM 4T 2-Input AND based on muxiplayers pass logic"; */ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } pin (a) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (b) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (out) { direction : "output"; related_ground_pin : GND; related_power_pin : VCC; function : "!(a&b)"; max_fanout : 10; timing () { related_pin : "a"; timing_sense : positive_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } timing () { related_pin : "b"; timing_sense : positive_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } } cell(and_not_4T) { - area : 3472; + area : 1288; cell_footprint : and_4T; /* cell_description : "NEM 4T 2-Input AND based on muxiplayers pass logic having inverted input"; */ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } pin (a) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (b) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (out) { direction : "output"; related_ground_pin : GND; related_power_pin : VCC; function : "a&!(b)"; max_fanout : 10; timing () { related_pin : "a"; timing_sense : positive_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } timing () { related_pin : "b"; timing_sense : positive_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } } cell(or_4T) { - area : 3472; + area : 1288; cell_footprint : or_4T; /* cell_description : "NEM 4T 2-Input OR based on muxiplayers pass logic"; */ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } pin (a) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (b) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (out) { direction : "output"; related_ground_pin : GND; related_power_pin : VCC; function : "a|b"; max_fanout : 10; timing () { related_pin : "a"; timing_sense : positive_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } timing () { related_pin : "b"; timing_sense : positive_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } } cell(nor_4T) { - area : 4632; + area : 2448; cell_footprint : or_4T; /* cell_description : "NEM 4T 2-Input NOR based on muxiplayers pass logic"; */ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } pin (a) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (b) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (out) { direction : "output"; related_ground_pin : GND; related_power_pin : VCC; function : "a|b"; max_fanout : 10; timing () { related_pin : "a"; timing_sense : positive_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } timing () { related_pin : "b"; timing_sense : positive_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } } cell(or_not_4T) { - area : 3472; + area : 1288; cell_footprint : or_4T; /* cell_description : "NEM 4T 2-Input OR based on muxiplayers pass logic having inverted input"; */ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } pin (a) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (b) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (out) { direction : "output"; related_ground_pin : GND; related_power_pin : VCC; function : "a|!(b)"; max_fanout : 10; timing () { related_pin : "a"; timing_sense : positive_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } timing () { related_pin : "b"; timing_sense : positive_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } } cell(xor_4T) { - area : 4632; + area : 2448; cell_footprint : xor_3T; /* cell_description : "NEM 4T 2-Input XOR based on 2 4T and 3T inverter"; */ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } pin (a) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (b) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (out) { direction : "output"; related_ground_pin : GND; related_power_pin : VCC; function : "a^b"; max_fanout : 10; timing () { related_pin : "a"; timing_sense : non_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } timing () { related_pin : "b"; timing_sense : non_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } } cell(xnor_4T) { - area : 4632; + area : 2448; cell_footprint : xor_3T; /* cell_description : "NEM 4T 2-Input XNOR based on 2 4T and 3T inverter"; */ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } pin (a) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (b) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (out) { direction : "output"; related_ground_pin : GND; related_power_pin : VCC; function : "!(a^b)"; max_fanout : 10; timing () { related_pin : "a"; timing_sense : non_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } timing () { related_pin : "b"; timing_sense : non_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } } cell(xor_4T_test) { area : 1; cell_footprint : xor_3T; /* cell_description : "NEM 4T 2-Input XOR based on 2 4T needs an inverted input"; */ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } pin (a) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (b) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (c) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (out) { direction : "output"; related_ground_pin : GND; related_power_pin : VCC; function : "(a&c)|(!(a)&b)"; max_fanout : 10; timing () { related_pin : "a"; timing_sense : non_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } timing () { related_pin : "b"; timing_sense : non_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } pin_opposite("b","c"); } /* cell(SR_latch) { area : 2704; cell_footprint : SR_latch; cell_description : "NEM based S-R type Latch"; pin (S) { direction : "input"; } pin (R) { direction : "input"; } pin (Q) { direction : "output"; function : "IQ"; } pin (Q_bar) { direction : "output"; function : "IQB"; } latch (IQ,IQB) { preset : "S" clear : "R" clear_preset_var1 : L; clear_preset_var2 : L; } statetable (" R S ", " IQ IQB "){ table : "H L : - - : L H ,\ L H : - - : H L ,\ H H : - - : L L ,\ L L : - - : N N"; } } */ cell(D_latch) { area : 9448; cell_footprint : D_latch; /* cell_description : "NEM based D type Latch"; */ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } pin (D) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; /* data_in_type : data;*/ /* timing() { related_pin : "EN"; timing_type : hold_rising; rise_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("-0.2,-2.0","-0.21,-2.1"); } fall_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","-0.21,4.1"); } } timing() { related_pin : "EN"; timing_type : setup_rising; rise_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("-0.2,-2.0","-0.21,-2.1"); } fall_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","-0.21,4.1"); } } */ } pin (EN) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (Q) { direction : "output"; function : "QOUT"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; /* timing () { related_pin : "D"; timing_sense : positive_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } timing () { related_pin : "EN"; timing_sense : non_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } */ } pin (Q_bar) { direction : "output"; function : "QBOUT"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; /* timing () { related_pin : "D"; timing_sense : negative_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } timing () { related_pin : "EN"; timing_sense : non_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } */ } latch (QOUT,QBOUT) { enable : "EN"; data_in : "D"; } } cell(D_latch_rst) { area : 13432; cell_footprint : D_latch_rst; /* cell_description : "NEM based D type Latch with reset"; */ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } pin (D) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; /* data_in_type : data;*/ } pin (EN) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (rst) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (Q) { direction : "output"; function : "QOUT"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; timing () { related_pin : "D"; timing_sense : positive_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } timing () { related_pin : "EN"; timing_sense : non_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4darkblue.0","0.21,4.1"); } } } pin (Q_bar) { direction : "output"; function : "QBOUT"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; timing () { related_pin : "D"; timing_sense : negative_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } timing () { related_pin : "EN"; timing_sense : non_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } latch (QOUT,QBOUT) { enable : "EN"; data_in : "D"; clear : "rst"; } } cell(D_FF) { area : 20056; cell_footprint : D_FF; /* cell_description : "NEM based M-S D type Flip Flop"; */ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } pin (D) { nextstate_type : data; direction : "input"; related_ground_pin : GND; related_power_pin : VCC; max_transition : 0.2; capacitance : 1; timing () { related_pin : "CLK"; timing_type : hold_rising; rise_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("-0.2,-2.0","-0.21,-2.1"); } fall_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","-0.21,4.1"); } } timing () { related_pin : "CLK"; timing_type : setup_rising; rise_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","-0.21,4.1"); } } } pin (CLK) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (Q) { direction : "output"; function : "QOUT"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; timing () { related_pin : "CLK"; timing_sense : non_unate; timing_type : rising_edge; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } pin (Q_bar) { direction : "output"; function : "QBOUT"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; timing () { related_pin : "CLK"; timing_sense : non_unate; timing_type : rising_edge; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } ff (QOUT,QBOUT) { clocked_on : "CLK"; next_state : "D"; } } cell(D_FF_rst) { area : 28184; cell_footprint : D_FF_rst; /* cell_description : "NEM based M-S D type Flip Flop with reset"; */ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } pin (D) { nextstate_type : data; direction : "input"; related_ground_pin : GND; related_power_pin : VCC; max_transition : 0.2; capacitance : 1; timing () { related_pin : "CLK"; timing_type : hold_rising; rise_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("-0.2,-2.0","-0.21,-2.1"); } fall_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","-0.21,4.1"); } } timing () { related_pin : "CLK"; timing_type : setup_rising; rise_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,-4.0","0.21,4.1"); } } } pin (rst) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; timing () { related_pin : "CLK"; timing_type : recovery_rising; rise_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("-0.2,-2.0","-0.21,-2.1"); } } timing () { related_pin : "CLK"; timing_type : removal_rising; rise_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } } } pin (CLK) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (Q) { direction : "output"; function : "QOUT"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; timing () { related_pin : "CLK"; timing_sense : non_unate; timing_type : rising_edge; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } pin (Q_bar) { direction : "output"; function : "QBOUT"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; timing () { related_pin : "CLK"; timing_sense : non_unate; timing_type : rising_edge; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } ff (QOUT,QBOUT) { clear : "rst"; clocked_on : "CLK"; next_state : "D"; } } /* SCAN FUNCTIONALITY HASN'T BEEN ADDED YET */ cell(S_FF) { area : 20056; cell_footprint : D_FF; /* cell_description : "NEM based M-S D type Flip Flop with scan functionality";*/ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } pin (D) { nextstate_type : data; direction : "input"; related_ground_pin : GND; related_power_pin : VCC; max_transition : 0.2; capacitance : 1; timing () { related_pin : "CLK"; timing_type : hold_rising; rise_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("-0.2,-2.0","-0.21,-2.1"); } fall_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","-0.21,4.1"); } } timing () { related_pin : "CLK"; timing_type : setup_rising; rise_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","-0.21,4.1"); } } } pin (SI) { nextstate_type : data; direction : "input"; related_ground_pin : GND; related_power_pin : VCC; max_transition : 0.2; capacitance : 1; timing () { related_pin : "CLK"; timing_type : hold_rising; rise_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("-0.2,-2.0","-0.21,-2.1"); } fall_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","-0.21,4.1"); } } timing () { related_pin : "CLK"; timing_type : setup_rising; rise_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","-0.21,4.1"); } } } pin (CLK) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (Q) { direction : "output"; function : "QOUT"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; timing () { related_pin : "CLK"; timing_sense : non_unate; timing_type : rising_edge; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } pin (Q_bar) { direction : "output"; function : "QBOUT"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; timing () { related_pin : "CLK"; timing_sense : non_unate; timing_type : rising_edge; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } ff (QOUT,QBOUT) { clocked_on : "CLK"; next_state : "D"; } } /* SCAN FUNCTIONALITY HASN'T BEEN ADDED YET */ cell(S_FF_rst) { area : 28184; cell_footprint : S_FF_rst; /* cell_description : "NEM based M-S D type Flip Flop with reset and scan functionality"; */ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } pin (D) { nextstate_type : data; direction : "input"; related_ground_pin : GND; related_power_pin : VCC; max_transition : 0.2; capacitance : 1; timing () { related_pin : "CLK"; timing_type : hold_rising; rise_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("-0.2,-2.0","-0.21,-2.1"); } fall_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","-0.21,4.1"); } } timing () { related_pin : "CLK"; timing_type : setup_rising; rise_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,-4.0","0.21,4.1"); } } } pin (rst) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; timing () { related_pin : "CLK"; timing_type : recovery_rising; rise_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("-0.2,-2.0","-0.21,-2.1"); } } timing () { related_pin : "CLK"; timing_type : removal_rising; rise_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } } } pin (CLK) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (Q) { direction : "output"; function : "QOUT"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; timing () { related_pin : "CLK"; timing_sense : non_unate; timing_type : rising_edge; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } pin (Q_bar) { direction : "output"; function : "QBOUT"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; timing () { related_pin : "CLK"; timing_sense : non_unate; timing_type : rising_edge; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } ff (QOUT,QBOUT) { clear : "rst"; clocked_on : "CLK"; next_state : "D"; } } } diff --git a/nem_basic_yosys_extended.lib b/nem_basic_yosys_extended_old.lib similarity index 100% copy from nem_basic_yosys_extended.lib copy to nem_basic_yosys_extended_old.lib diff --git a/nem_basic_yosys_restricted.lib b/nem_basic_yosys_restricted.lib index ffb6f1a..3593676 100644 --- a/nem_basic_yosys_restricted.lib +++ b/nem_basic_yosys_restricted.lib @@ -1,1341 +1,1929 @@ library (nem_basic) { comment : "Manually created liberty with more gates - ignore any timing information"; date : "$April 26th 2024$"; revision : "0.2"; delay_model : table_lookup; capacitive_load_unit (1,pf); time_unit : "1ns"; current_unit : "1uA"; voltage_unit : "1V"; voltage_map (VCC,15); voltage_map (GND,0); default_cell_leakage_power : 0; default_fanout_load : 1; default_max_transition : 500; default_output_pin_cap : 0; input_threshold_pct_rise : 50.0; input_threshold_pct_fall : 50.0; output_threshold_pct_rise : 50.0; output_threshold_pct_fall : 50.0; slew_lower_threshold_pct_rise : 20.0; slew_lower_threshold_pct_fall : 20.0; slew_upper_threshold_pct_rise : 80.0; slew_upper_threshold_pct_fall : 80.0; slew_derate_from_library : 1.0; nom_process : 1; nom_temperature : 125; nom_voltage : 15; operating_conditions (NEM_BASIC_COND) { process : 1; temperature : 125; voltage : 29; } default_operating_conditions : NEM_BASIC_COND; lu_table_template (delay_template_2x2) { variable_1 : input_net_transition; variable_2 : total_output_net_capacitance; index_1("0.01,0.1"); index_2("0.02,0.2"); } lu_table_template (constraint_template_2x2) { variable_1 : constrained_pin_transition; variable_2 : related_pin_transition; index_1("0.01,0.1"); index_2("0.02,0.2"); } cell(inv_3T) { area : 1160; cell_footprint : inv_3T; /* cell_description : "NEM 3T Inverter"; */ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } pin (in) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (out) { direction : "output"; related_ground_pin : GND; related_power_pin : VCC; function : "!(in)"; max_capacitance : 10; max_fanout : 10; max_transition : 500; timing () { related_pin : "in"; timing_sense : negative_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } } - cell(mux_4T) { - area : 3472; + area : 1288; cell_footprint : mux_4T; /* cell_description : "NEM 4T 2-Input MUX"; */ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } /*bundle(in) { members(in_0,in_1); direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; }*/ pin(in_0){ direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin(in_1){ direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (sel) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (out) { direction : "output"; related_ground_pin : GND; related_power_pin : VCC; function : "(!sel & in_0) | (sel & in_1)"; max_fanout : 10; timing () { related_pin : "in_0"; timing_sense : positive_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } timing () { related_pin : "in_1"; timing_sense : positive_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } timing () { related_pin : "sel"; timing_sense : non_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } } +cell(and_4T) { + area : 1000000; + cell_footprint : and_4T; +/* cell_description : "NEM 4T 2-Input AND based on muxiplayers pass logic"; */ + pg_pin (VCC) { + pg_type : primary_power; + voltage_name : "VCC"; + } + pg_pin (GND) { + pg_type : primary_ground; + voltage_name : "GND"; + } + pin (a) { + direction : "input"; + related_ground_pin : GND; + related_power_pin : VCC; + capacitance : 1; + } + pin (b) { + direction : "input"; + related_ground_pin : GND; + related_power_pin : VCC; + capacitance : 1; + } + pin (out) { + direction : "output"; + related_ground_pin : GND; + related_power_pin : VCC; + function : "a&b"; + max_fanout : 10; + timing () { + related_pin : "a"; + timing_sense : positive_unate; + timing_type : combinational; + cell_rise (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,2.0","0.21,2.1"); + } + rise_transition (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,4.0","0.21,4.1"); + } + cell_fall (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,2.0","0.21,2.1"); + } + fall_transition (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,4.0","0.21,4.1"); + } + } + timing () { + related_pin : "b"; + timing_sense : positive_unate; + timing_type : combinational; + cell_rise (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,2.0","0.21,2.1"); + } + rise_transition (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,4.0","0.21,4.1"); + } + cell_fall (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,2.0","0.21,2.1"); + } + fall_transition (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,4.0","0.21,4.1"); + } + } + } +} + +cell(nand_4T) { + area : 1000000; + cell_footprint : and_4T; +/* cell_description : "NEM 4T 2-Input AND based on muxiplayers pass logic"; */ + pg_pin (VCC) { + pg_type : primary_power; + voltage_name : "VCC"; + } + pg_pin (GND) { + pg_type : primary_ground; + voltage_name : "GND"; + } + pin (a) { + direction : "input"; + related_ground_pin : GND; + related_power_pin : VCC; + capacitance : 1; + } + pin (b) { + direction : "input"; + related_ground_pin : GND; + related_power_pin : VCC; + capacitance : 1; + } + pin (out) { + direction : "output"; + related_ground_pin : GND; + related_power_pin : VCC; + function : "!(a&b)"; + max_fanout : 10; + timing () { + related_pin : "a"; + timing_sense : positive_unate; + timing_type : combinational; + cell_rise (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,2.0","0.21,2.1"); + } + rise_transition (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,4.0","0.21,4.1"); + } + cell_fall (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,2.0","0.21,2.1"); + } + fall_transition (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,4.0","0.21,4.1"); + } + } + timing () { + related_pin : "b"; + timing_sense : positive_unate; + timing_type : combinational; + cell_rise (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,2.0","0.21,2.1"); + } + rise_transition (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,4.0","0.21,4.1"); + } + cell_fall (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,2.0","0.21,2.1"); + } + fall_transition (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,4.0","0.21,4.1"); + } + } + } +} + +cell(and_not_4T) { + area : 1000000; + cell_footprint : and_4T; +/* cell_description : "NEM 4T 2-Input AND based on muxiplayers pass logic having inverted input"; */ + pg_pin (VCC) { + pg_type : primary_power; + voltage_name : "VCC"; + } + pg_pin (GND) { + pg_type : primary_ground; + voltage_name : "GND"; + } + pin (a) { + direction : "input"; + related_ground_pin : GND; + related_power_pin : VCC; + capacitance : 1; + } + pin (b) { + direction : "input"; + related_ground_pin : GND; + related_power_pin : VCC; + capacitance : 1; + } + pin (out) { + direction : "output"; + related_ground_pin : GND; + related_power_pin : VCC; + function : "a&!(b)"; + max_fanout : 10; + timing () { + related_pin : "a"; + timing_sense : positive_unate; + timing_type : combinational; + cell_rise (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,2.0","0.21,2.1"); + } + rise_transition (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,4.0","0.21,4.1"); + } + cell_fall (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,2.0","0.21,2.1"); + } + fall_transition (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,4.0","0.21,4.1"); + } + } + timing () { + related_pin : "b"; + timing_sense : positive_unate; + timing_type : combinational; + cell_rise (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,2.0","0.21,2.1"); + } + rise_transition (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,4.0","0.21,4.1"); + } + cell_fall (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,2.0","0.21,2.1"); + } + fall_transition (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,4.0","0.21,4.1"); + } + } + } +} + cell(or_4T) { - area : 3472; + area : 1000000; cell_footprint : or_4T; /* cell_description : "NEM 4T 2-Input OR based on muxiplayers pass logic"; */ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } pin (a) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (b) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (out) { direction : "output"; related_ground_pin : GND; related_power_pin : VCC; function : "a|b"; max_fanout : 10; timing () { related_pin : "a"; timing_sense : positive_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } timing () { related_pin : "b"; timing_sense : positive_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } } cell(nor_4T) { - area : 4632; + area : 1000000; cell_footprint : or_4T; /* cell_description : "NEM 4T 2-Input NOR based on muxiplayers pass logic"; */ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } pin (a) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (b) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (out) { direction : "output"; related_ground_pin : GND; related_power_pin : VCC; function : "a|b"; max_fanout : 10; timing () { related_pin : "a"; timing_sense : positive_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } timing () { related_pin : "b"; timing_sense : positive_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } } + +cell(or_not_4T) { + area : 1000000; + cell_footprint : or_4T; +/* cell_description : "NEM 4T 2-Input OR based on muxiplayers pass logic having inverted input"; */ + pg_pin (VCC) { + pg_type : primary_power; + voltage_name : "VCC"; + } + pg_pin (GND) { + pg_type : primary_ground; + voltage_name : "GND"; + } + pin (a) { + direction : "input"; + related_ground_pin : GND; + related_power_pin : VCC; + capacitance : 1; + } + pin (b) { + direction : "input"; + related_ground_pin : GND; + related_power_pin : VCC; + capacitance : 1; + } + pin (out) { + direction : "output"; + related_ground_pin : GND; + related_power_pin : VCC; + function : "a|!(b)"; + max_fanout : 10; + timing () { + related_pin : "a"; + timing_sense : positive_unate; + timing_type : combinational; + cell_rise (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,2.0","0.21,2.1"); + } + rise_transition (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,4.0","0.21,4.1"); + } + cell_fall (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,2.0","0.21,2.1"); + } + fall_transition (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,4.0","0.21,4.1"); + } + } + timing () { + related_pin : "b"; + timing_sense : positive_unate; + timing_type : combinational; + cell_rise (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,2.0","0.21,2.1"); + } + rise_transition (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,4.0","0.21,4.1"); + } + cell_fall (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,2.0","0.21,2.1"); + } + fall_transition (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,4.0","0.21,4.1"); + } + } + } +} + +cell(xor_4T) { + area : 1000000; + cell_footprint : xor_3T; +/* cell_description : "NEM 4T 2-Input XOR based on 2 4T and 3T inverter"; */ + pg_pin (VCC) { + pg_type : primary_power; + voltage_name : "VCC"; + } + pg_pin (GND) { + pg_type : primary_ground; + voltage_name : "GND"; + } + pin (a) { + direction : "input"; + related_ground_pin : GND; + related_power_pin : VCC; + capacitance : 1; + } + pin (b) { + direction : "input"; + related_ground_pin : GND; + related_power_pin : VCC; + capacitance : 1; + } + pin (out) { + direction : "output"; + related_ground_pin : GND; + related_power_pin : VCC; + function : "a^b"; + max_fanout : 10; + timing () { + related_pin : "a"; + timing_sense : non_unate; + timing_type : combinational; + cell_rise (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,2.0","0.21,2.1"); + } + rise_transition (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,4.0","0.21,4.1"); + } + cell_fall (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,2.0","0.21,2.1"); + } + fall_transition (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,4.0","0.21,4.1"); + } + } + timing () { + related_pin : "b"; + timing_sense : non_unate; + timing_type : combinational; + cell_rise (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,2.0","0.21,2.1"); + } + rise_transition (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,4.0","0.21,4.1"); + } + cell_fall (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,2.0","0.21,2.1"); + } + fall_transition (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,4.0","0.21,4.1"); + } + } + } +} + +cell(xnor_4T) { + area : 1000000; + cell_footprint : xor_3T; +/* cell_description : "NEM 4T 2-Input XNOR based on 2 4T and 3T inverter"; */ + pg_pin (VCC) { + pg_type : primary_power; + voltage_name : "VCC"; + } + pg_pin (GND) { + pg_type : primary_ground; + voltage_name : "GND"; + } + pin (a) { + direction : "input"; + related_ground_pin : GND; + related_power_pin : VCC; + capacitance : 1; + } + pin (b) { + direction : "input"; + related_ground_pin : GND; + related_power_pin : VCC; + capacitance : 1; + } + pin (out) { + direction : "output"; + related_ground_pin : GND; + related_power_pin : VCC; + function : "!(a^b)"; + max_fanout : 10; + timing () { + related_pin : "a"; + timing_sense : non_unate; + timing_type : combinational; + cell_rise (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,2.0","0.21,2.1"); + } + rise_transition (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,4.0","0.21,4.1"); + } + cell_fall (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,2.0","0.21,2.1"); + } + fall_transition (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,4.0","0.21,4.1"); + } + } + timing () { + related_pin : "b"; + timing_sense : non_unate; + timing_type : combinational; + cell_rise (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,2.0","0.21,2.1"); + } + rise_transition (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,4.0","0.21,4.1"); + } + cell_fall (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,2.0","0.21,2.1"); + } + fall_transition (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,4.0","0.21,4.1"); + } + } + } +} + +cell(xor_4T_test) { + area : 1000000; + cell_footprint : xor_3T; +/* cell_description : "NEM 4T 2-Input XOR based on 2 4T needs an inverted input"; */ + pg_pin (VCC) { + pg_type : primary_power; + voltage_name : "VCC"; + } + pg_pin (GND) { + pg_type : primary_ground; + voltage_name : "GND"; + } + pin (a) { + direction : "input"; + related_ground_pin : GND; + related_power_pin : VCC; + capacitance : 1; + } + pin (b) { + direction : "input"; + related_ground_pin : GND; + related_power_pin : VCC; + capacitance : 1; + } + pin (c) { + direction : "input"; + related_ground_pin : GND; + related_power_pin : VCC; + capacitance : 1; + } + pin (out) { + direction : "output"; + related_ground_pin : GND; + related_power_pin : VCC; + function : "(a&c)|(!(a)&b)"; + max_fanout : 10; + timing () { + related_pin : "a"; + timing_sense : non_unate; + timing_type : combinational; + cell_rise (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,2.0","0.21,2.1"); + } + rise_transition (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,4.0","0.21,4.1"); + } + cell_fall (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,2.0","0.21,2.1"); + } + fall_transition (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,4.0","0.21,4.1"); + } + } + timing () { + related_pin : "b"; + timing_sense : non_unate; + timing_type : combinational; + cell_rise (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,2.0","0.21,2.1"); + } + rise_transition (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,4.0","0.21,4.1"); + } + cell_fall (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,2.0","0.21,2.1"); + } + fall_transition (delay_template_2x2) { + index_1 ("0.01,0.1"); + index_2 ("0.02,0.2"); + values ("0.2,4.0","0.21,4.1"); + } + } + } + pin_opposite("b","c"); +} + /* cell(SR_latch) { area : 2704; cell_footprint : SR_latch; cell_description : "NEM based S-R type Latch"; pin (S) { direction : "input"; } pin (R) { direction : "input"; } pin (Q) { direction : "output"; function : "IQ"; } pin (Q_bar) { direction : "output"; function : "IQB"; } latch (IQ,IQB) { preset : "S" clear : "R" clear_preset_var1 : L; clear_preset_var2 : L; } statetable (" R S ", " IQ IQB "){ table : "H L : - - : L H ,\ L H : - - : H L ,\ H H : - - : L L ,\ L L : - - : N N"; } } */ cell(D_latch) { area : 9448; cell_footprint : D_latch; /* cell_description : "NEM based D type Latch"; */ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } pin (D) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; /* data_in_type : data;*/ /* timing() { related_pin : "EN"; timing_type : hold_rising; rise_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("-0.2,-2.0","-0.21,-2.1"); } fall_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","-0.21,4.1"); } } timing() { related_pin : "EN"; timing_type : setup_rising; rise_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("-0.2,-2.0","-0.21,-2.1"); } fall_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","-0.21,4.1"); } } */ } pin (EN) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (Q) { direction : "output"; function : "QOUT"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; /* timing () { related_pin : "D"; timing_sense : positive_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } timing () { related_pin : "EN"; timing_sense : non_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } */ } pin (Q_bar) { direction : "output"; function : "QBOUT"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; /* timing () { related_pin : "D"; timing_sense : negative_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } timing () { related_pin : "EN"; timing_sense : non_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } */ } latch (QOUT,QBOUT) { enable : "EN"; data_in : "D"; } } cell(D_latch_rst) { area : 13432; cell_footprint : D_latch_rst; /* cell_description : "NEM based D type Latch with reset"; */ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } pin (D) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; /* data_in_type : data;*/ } pin (EN) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (rst) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (Q) { direction : "output"; function : "QOUT"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; timing () { related_pin : "D"; timing_sense : positive_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } timing () { related_pin : "EN"; timing_sense : non_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4darkblue.0","0.21,4.1"); } } } pin (Q_bar) { direction : "output"; function : "QBOUT"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; timing () { related_pin : "D"; timing_sense : negative_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } timing () { related_pin : "EN"; timing_sense : non_unate; timing_type : combinational; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } latch (QOUT,QBOUT) { enable : "EN"; data_in : "D"; clear : "rst"; } } cell(D_FF) { area : 20056; cell_footprint : D_FF; /* cell_description : "NEM based M-S D type Flip Flop"; */ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } pin (D) { nextstate_type : data; direction : "input"; related_ground_pin : GND; related_power_pin : VCC; max_transition : 0.2; capacitance : 1; timing () { related_pin : "CLK"; timing_type : hold_rising; rise_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("-0.2,-2.0","-0.21,-2.1"); } fall_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","-0.21,4.1"); } } timing () { related_pin : "CLK"; timing_type : setup_rising; rise_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","-0.21,4.1"); } } } pin (CLK) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (Q) { direction : "output"; function : "QOUT"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; timing () { related_pin : "CLK"; timing_sense : non_unate; timing_type : rising_edge; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } pin (Q_bar) { direction : "output"; function : "QBOUT"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; timing () { related_pin : "CLK"; timing_sense : non_unate; timing_type : rising_edge; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } ff (QOUT,QBOUT) { clocked_on : "CLK"; next_state : "D"; } } cell(D_FF_rst) { area : 28184; cell_footprint : D_FF_rst; /* cell_description : "NEM based M-S D type Flip Flop with reset"; */ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } pin (D) { nextstate_type : data; direction : "input"; related_ground_pin : GND; related_power_pin : VCC; max_transition : 0.2; capacitance : 1; timing () { related_pin : "CLK"; timing_type : hold_rising; rise_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("-0.2,-2.0","-0.21,-2.1"); } fall_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","-0.21,4.1"); } } timing () { related_pin : "CLK"; timing_type : setup_rising; rise_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,-4.0","0.21,4.1"); } } } pin (rst) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; timing () { related_pin : "CLK"; timing_type : recovery_rising; rise_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("-0.2,-2.0","-0.21,-2.1"); } } timing () { related_pin : "CLK"; timing_type : removal_rising; rise_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } } } pin (CLK) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (Q) { direction : "output"; function : "QOUT"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; timing () { related_pin : "CLK"; timing_sense : non_unate; timing_type : rising_edge; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } pin (Q_bar) { direction : "output"; function : "QBOUT"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; timing () { related_pin : "CLK"; timing_sense : non_unate; timing_type : rising_edge; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } ff (QOUT,QBOUT) { clear : "rst"; clocked_on : "CLK"; next_state : "D"; } } /* SCAN FUNCTIONALITY HASN'T BEEN ADDED YET */ cell(S_FF) { area : 20056; cell_footprint : D_FF; /* cell_description : "NEM based M-S D type Flip Flop with scan functionality";*/ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } pin (D) { nextstate_type : data; direction : "input"; related_ground_pin : GND; related_power_pin : VCC; max_transition : 0.2; capacitance : 1; timing () { related_pin : "CLK"; timing_type : hold_rising; rise_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("-0.2,-2.0","-0.21,-2.1"); } fall_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","-0.21,4.1"); } } timing () { related_pin : "CLK"; timing_type : setup_rising; rise_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","-0.21,4.1"); } } } pin (SI) { nextstate_type : data; direction : "input"; related_ground_pin : GND; related_power_pin : VCC; max_transition : 0.2; capacitance : 1; timing () { related_pin : "CLK"; timing_type : hold_rising; rise_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("-0.2,-2.0","-0.21,-2.1"); } fall_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","-0.21,4.1"); } } timing () { related_pin : "CLK"; timing_type : setup_rising; rise_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","-0.21,4.1"); } } } pin (CLK) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (Q) { direction : "output"; function : "QOUT"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; timing () { related_pin : "CLK"; timing_sense : non_unate; timing_type : rising_edge; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } pin (Q_bar) { direction : "output"; function : "QBOUT"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; timing () { related_pin : "CLK"; timing_sense : non_unate; timing_type : rising_edge; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } ff (QOUT,QBOUT) { clocked_on : "CLK"; next_state : "D"; } } /* SCAN FUNCTIONALITY HASN'T BEEN ADDED YET */ cell(S_FF_rst) { area : 28184; cell_footprint : S_FF_rst; /* cell_description : "NEM based M-S D type Flip Flop with reset and scan functionality"; */ pg_pin (VCC) { pg_type : primary_power; voltage_name : "VCC"; } pg_pin (GND) { pg_type : primary_ground; voltage_name : "GND"; } pin (D) { nextstate_type : data; direction : "input"; related_ground_pin : GND; related_power_pin : VCC; max_transition : 0.2; capacitance : 1; timing () { related_pin : "CLK"; timing_type : hold_rising; rise_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("-0.2,-2.0","-0.21,-2.1"); } fall_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","-0.21,4.1"); } } timing () { related_pin : "CLK"; timing_type : setup_rising; rise_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,-4.0","0.21,4.1"); } } } pin (rst) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; timing () { related_pin : "CLK"; timing_type : recovery_rising; rise_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("-0.2,-2.0","-0.21,-2.1"); } } timing () { related_pin : "CLK"; timing_type : removal_rising; rise_constraint (constraint_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } } } pin (CLK) { direction : "input"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; } pin (Q) { direction : "output"; function : "QOUT"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; timing () { related_pin : "CLK"; timing_sense : non_unate; timing_type : rising_edge; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } pin (Q_bar) { direction : "output"; function : "QBOUT"; related_ground_pin : GND; related_power_pin : VCC; capacitance : 1; timing () { related_pin : "CLK"; timing_sense : non_unate; timing_type : rising_edge; cell_rise (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } rise_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } cell_fall (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,2.0","0.21,2.1"); } fall_transition (delay_template_2x2) { index_1 ("0.01,0.1"); index_2 ("0.02,0.2"); values ("0.2,4.0","0.21,4.1"); } } } ff (QOUT,QBOUT) { clear : "rst"; clocked_on : "CLK"; next_state : "D"; } } } diff --git a/yosys/bruteforce.ys b/yosys/bruteforce.ys index f761461..bcec60a 100644 --- a/yosys/bruteforce.ys +++ b/yosys/bruteforce.ys @@ -1,37 +1,31 @@ read_verilog {{FILE}} #map to basic cells techmap write_blif ./temp/{{FILE_BASENAME}}.blif -abc -liberty ./{{LIBERTY_FILE}} -script "+strash; &get -n; collapse; write_eqn ./temp/{{FILE_BASENAME}}.eqn; write_truth ./temp/{{FILE_BASENAME}}.truth; write_pla ./temp/{{FILE_BASENAME}}.pla" -exec -- ./mockturtle/build/experiments/muxig_rewriting ./temp/{{FILE_BASENAME}}.blif - +#abc -liberty ./{{LIBERTY_FILE}} -script "+strash; &get -n; collapse; write_eqn ./temp/{{FILE_BASENAME}}.eqn; write_truth ./temp/{{FILE_BASENAME}}.truth; write_pla ./temp/{{FILE_BASENAME}}.pla" delete -read_blif ./temp/{{FILE_BASENAME}}_mockturtle.blif - -cd top -rename pi1 N1 -rename pi2 N2 -rename pi3 N3 -rename pi4 N6 -rename pi5 N7 - -rename po0 N22 -rename po1 N23 +exec -- ./mockturtle/build/experiments/muxig_rewriting ./temp/{{FILE_BASENAME}}.blif +exec -- python3 ./yosys/map_ports.py ./temp/{{FILE_BASENAME}}.blif ./temp/{{FILE_BASENAME}}_mockturtle.blif -cd .. +read_blif ./temp/mapped_{{FILE_BASENAME}}_mockturtle.blif rename top {{MODULE}}_nem -read_liberty {{LIBERTY_FILE}} techmap -map ./yosys/mockturtle_map.v clean techmap clean -select c17_nem +opt +clean + +abc -liberty {{LIBERTY_FILE}} -script "+attach" + +clean + write_verilog -selected ./temp/{{FILE_BASENAME}}_nem.v #Output stats tee -o ./temp/{{FILE_BASENAME}}_{{LIBERTY_USED}}.stat stat -liberty ./{{LIBERTY_FILE}} diff --git a/yosys/map_ports.py b/yosys/map_ports.py new file mode 100644 index 0000000..285f409 --- /dev/null +++ b/yosys/map_ports.py @@ -0,0 +1,63 @@ +#!/usr/bin/env python3 +import re +import sys +import os + +if(len(sys.argv)!=3): + sys.exit("Use format: map_pors YOSYS_BLIF_FILE MOCKTURTLE_BLIF_FILE") + +yosys_file = sys.argv[1] +mockturtle_file = sys.argv[2] + +print("mapping: " + mockturtle_file + " to " + yosys_file) + +os.system('pwd') + +inputVariables = [] +outputVariables = [] + +with open(yosys_file, 'r') as infile: + lines = infile.readlines() + + +for line in lines: + if line.startswith(".inputs"): + inputs = line.split() + inputVariables = inputs[1:] + + if line.startswith(".outputs"): + outputs = line.split() + outputVariables = outputs[1:] + +print('input variables',inputVariables) +print('ouput variables',outputVariables) + +replacementList = {} + +for x in range(len(inputVariables)): + inputReplaceVar = "pi" + str(x + 1) + replacementList.update({inputReplaceVar:inputVariables[x]}) + +for x in range(len(outputVariables)): + inputReplaceVar = "po" + str(x) + replacementList.update({inputReplaceVar:outputVariables[x]}) + +print('replacement list:',replacementList) + +# construct mapped path. +mapped_file_parts = mockturtle_file.split('/') +mapped_file_parts[-1] = "mapped_" + mapped_file_parts[-1] +mapped_file = "/".join(mapped_file_parts) + + +#replace the replacement items in the blif Mockturtle file back to yosys input and outputs +with open(mockturtle_file, 'r') as mockfile: + with open(mapped_file, 'w') as outfile: + for line in mockfile: + for src, target in replacementList.items(): + line = line.replace(src + " ", target + " ") + if(target in outputVariables): + line = line.replace(src, target) + outfile.write(line) + +print("finished mapping ports") \ No newline at end of file diff --git a/yosys/mockturtle_map.v b/yosys/mockturtle_map.v index 8579dc5..f0d0b4b 100644 --- a/yosys/mockturtle_map.v +++ b/yosys/mockturtle_map.v @@ -1,51 +1,51 @@ (* techmap_celltype = "$lut" *) module \$lut_1 (A, Y); parameter LUT = 0; parameter WIDTH = 3; wire _TECHMAP_FAIL_ = (WIDTH != 3) || LUT != 8'b11100100; input [WIDTH-1:0] A; output Y; $mux #(.WIDTH(1)) switch_mux_1 (.A(A[2]),.B(A[1]),.S(~A[0]),.Y(Y)); endmodule (* techmap_celltype = "$lut" *) module \$lut_2 (A, Y); parameter LUT = 0; parameter WIDTH = 3; wire _TECHMAP_FAIL_ = (WIDTH != 3) || LUT != 8'b01001110; input [WIDTH-1:0] A; output Y; - $mux_4T #(.WIDTH(1)) switch_mux_2 (.A(~A[2]),.B(A[1]),.S(~A[0]),.Y(Y)); + $mux #(.WIDTH(1)) switch_mux_2 (.A(~A[2]),.B(A[1]),.S(~A[0]),.Y(Y)); endmodule (* techmap_celltype = "$lut" *) module \$lut_3 (A, Y); parameter LUT = 0; parameter WIDTH = 3; wire _TECHMAP_FAIL_ = (WIDTH != 3) || LUT != 8'b10001101; input [WIDTH-1:0] A; output Y; - $mux_4T #(.WIDTH(1)) switch_mux_3 (.A(~A[2]),.B(A[1]),.S(A[0]),.Y(Y)); + $mux #(.WIDTH(1)) switch_mux_3 (.A(~A[2]),.B(A[1]),.S(A[0]),.Y(Y)); endmodule (* techmap_celltype = "$lut" *) module \$lut_4 (A, Y); parameter LUT = 0; parameter WIDTH = 3; wire _TECHMAP_FAIL_ = (WIDTH != 1) || LUT != 2'b01; input [WIDTH-1:0] A; output Y; assign Y = ~A; endmodule \ No newline at end of file diff --git a/yosys/synth_nem.ys b/yosys/synth_nem.ys index 68b2550..6a6fbe5 100644 --- a/yosys/synth_nem.ys +++ b/yosys/synth_nem.ys @@ -1,56 +1,58 @@ echo on # read the information read_verilog {{FILE}} hierarchy -top {{MODULE}} #unroll the information proc; opt -full;; #flatten the counter to its lower parts flatten;; fsm ##show -prefix ./temp/{{MODULE}}_post_flatten {{MODULE}} #optimize opt -full;; ##show -prefix ./temp/{{MODULE}}_post_flatten_opt {{MODULE}} #Map to gates using the standard techmap available techmap #opt -full;; #mapping memory dfflibmap -liberty ./{{LIBERTY_FILE}};; #optimizing possible memory mapping opt -full;; ##show -prefix ./temp/{{MODULE}}_post_techmap {{MODULE}} #USE BLIF TO IMPORT TO ABC #write_blif ./temp/{{MODULE}}_intermediate.blif #USE JSON TO IMPORT TO SVG TOOL: https://neilturley.dev/netlistsvg/ #write_json ./temp/{{FILE_BASENAME}}_{{LIBERTY_USED}}.json #Replace basic combinational gates with those in our standard cell library #abc -liberty ./nem_basic_yosys.lib -script ./abc_script -showtmp abc -liberty ./{{LIBERTY_FILE}} ##show -prefix ./temp/{{MODULE}}_post_opt {{MODULE}} #Check if we can optimize further opt -full;; +clean -purge + #Write to file rename {{MODULE}} {{MODULE}}_nem write_verilog ./temp/{{FILE_BASENAME}}_nem.v #Output stats tee -o ./temp/{{FILE_BASENAME}}_{{LIBERTY_USED}}.stat stat -liberty ./{{LIBERTY_FILE}}